相关论文: Electrical analysis of hysteresis in solution proc…

Carbon nanotube field-effect transistors (CNT FETs) have been proposed as possible building blocks for future nano-electronics. But a challenge with CNT FETs is that they appear to randomly display varying amounts of hysteresis in their…

Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature.…

Electrical conductivity with gate-sweep in a few layer MoS$_2$-on-SiO$_2$ field-effect-transistor shows an abrupt reduction in hysteresis when cooled. The hysteresis and time dependent conductivity of the MoS$_2$ channel are modeled using…

We employ noise spectroscopy and transconductance measurements to establish the optimal regimes of operation for our fabricated silicon nanowire field-effect transistors (Si NW FETs) sensors. A strong coupling between the liquid gate and…

Graphene field effect transistors commonly comprise graphene flakes lying on SiO2 surfaces. The gate-voltage dependent conductance shows hysteresis depending on the gate sweeping rate/range. It is shown here that the transistors exhibit two…

Randomly distributed traps at the MoS$_2$/SiO$_2$ interface result in non-ideal transport behavior, including hysteresis in MoS$_2$/SiO$_2$ field effect transistors (FETs). Thus traps are mostly detrimental to the FET performance but they…

We investigate the origin of the hysteresis observed in the transfer characteristics of back-gated field-effect transistors with an exfoliated MoS2 channel. We find that the hysteresis is strongly enhanced by increasing either gate voltage,…

Gate capacitances of back-gated nanowire field-effect transistors (NW-FETs) are calculated by means of finite element methods and the results are compared with analytical results of the ``metallic cylinder on an infinite metal plate…

We investigate the mechanisms responsible for the low-frequency noise in liquid-gated nano-scale silicon nanowire field-effect transistors (SiNW-FETs) and show that the charge-noise level is lower than elementary charge. Our measurements…

An important consideration in miniaturizing transistors is maximizing the coupling between the gate and the semiconductor channel. A nanowire with a coaxial metal gate provides optimal gate-channel coupling, but has only been realized for…

Since the 1960's when Gordon Moore proposed that the transistor density in our electronic devices should double every two years while the cost is halved, the semiconductor industry has taken this statement to heart. Over the last few…

Indium-Arsenide (InAs) nanowire field-effect transistors (NWFETs) are promising platforms for high-speed, low-power nanoelectronics operating at cryogenic conditions, relevant for quantum information processing. We use selective area growth…

We propose a general theory for the analytical description of versatile hysteretic phenomena in a graphene field effect transistor (GFET) allowing for the existence of the external dipoles on graphene free surface and the localized states…

A counterclockwise hysteresis is observed at room temperature in the transfer characteristics of SrTiO$_3$ (STO) gated MoS$_2$ field effect transistor (FET) and attributed to bistable dipoles on the STO surface. The hysteresis is expectedly…

We report on the influence of low gamma irradiation (10^4 Gy) on the noise properties of individual carbon nanotube (CNT) field-effect transistors (FETs) with different gate configurations and two different dielectric layers, SiO2 and…

MoS$_2$ field-effect transistors (FETs) with high-\textit{k} oxides currently lag behind silicon standards in bias and temperature stability due to ubiquitous border oxide traps that cause clockwise (CW) hysteresis in gate transfer…

Hole spins in Ge/SiGe heterostructure quantum dots have emerged as promising qubits for quantum computation. The strong spin-orbit coupling (SOC), characteristic of heavy-hole states in Ge, enables fast and all-electrical qubit control.…

Studying the electrical and structural properties of the interface of the gate oxide (SiO2) with silicon carbide (4H-SiC) is a fundamental topic, with important implications for understanding and optimizing the performances of…

In this work, we demonstrate a silicon nanocrystal Field Effect Transistor (ncFET). Its operation is similar to that of a Tunnelling Field Effect Transistor (TFET) with two barriers in series. The tunnelling barriers are fabricated in very…

We measure top-gated graphene field effect transistors (GFETs) with nanosecond-range pulsed gate and drain voltages. Due to high-k dielectric or graphene imperfections, the drain current decreases ~10% over time scales of ~10 us, consistent…