相关论文: An efficient cntfet-based 7-input minority gate

The complementary field-effect transistors (CFETs), featuring vertically stacked n/p-FETs, enhance integration density and significantly reduce the area of standard cells such as static random-access memory (SRAM). However, the advantage of…

We report electronic transport on n-type silicon Single Electron Transistors (SETs) fabricated in Complementary Metal Oxide Semiconductor (CMOS) technology. The n-MOSSETs are built within a pre-industrial Fully Depleted Silicon On Insulator…

The lack of an easily realizable complementary circuit technology offering low static power consumption has been limiting the utilization of other semiconductor materials than silicon. In this publication, a novel depletion mode JFET based…

Junctionless transistors made of silicon have previously been demonstrated experimentally and by simulations. Junctionless devices do not require fabricating an abrupt source-drain junction and thus can be easier to implement in aggressive…

Substantial progress on field effect transistors "FETs" consisting of semiconducting single wall carbon nanotubes "s-SWNTs" without detectable traces of metallic nanotubes and impurities is reported. Nearly perfect removal of metallic…

This work demonstrates a novel energy-efficient tunnel FET (TFET)-CMOS hybrid foundry platform for ultralow-power AIoT applications. By utilizing the proposed monolithic integration process, the novel complementary n and p-type Si TFET…

Random networks of single-walled carbon nanotubes (CNTs) usually contain both metallic (m-CNTs) and semiconducting (s-CNTs) nanotubes with an approximate ratio of 1:2, which leads to a trade-off between on-conductance and on/off ratio. We…

Carbon Nanotubes have shown to be an attractive option in the race to find a replacement to silicon-based transistors, due to its high electrical conductivity, extraordinary mechanical strength, and thermal conductivity. However, challenges…

After more than 30 years of validation of Moore's law, the CMOS technology has already entered the nanoscale (sub-100nm) regime and faces strong limitations. The nanowire transistor is one candidate which has the potential to overcome the…

Complementary metal-oxide semiconductor (CMOS) technology has radically reshaped the world by taking humanity to the digital age. Cramming more transistors into the same physical space has enabled an exponential increase in computational…

We report a method to pattern monolayer graphene nanoconstriction field effect transistors (NCFETs) with critical dimensions below 10 nm. NCFET fabrication is enabled by the use of feedback controlled electromigration (FCE) to form a…

Gate-all-around Vertical Nanowire Field Effect Transistors (VNWFET) are emerging devices, which are well suited to pursue scaling beyond lateral scaling limitations around 7nm. This work explores the relative merits and drawbacks of the…

We report on the influence of low gamma irradiation (10^4 Gy) on the noise properties of individual carbon nanotube (CNT) field-effect transistors (FETs) with different gate configurations and two different dielectric layers, SiO2 and…

Gate-tunable transmon qubits are based on quantum conductors used as weak links within hybrid Josephson junctions. These gatemons have been implemented in just a handful of systems, all relying on extended conductors, namely epitaxial…

Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…

High-performance solution-processed short-channel carbon nanotube (CNT) thin film transistors (TFTs) are fabricated using densely aligned arrays of metallic CNTs (m-CNTs) as source and drain electrodes, and aligned arrays of semiconducting…

An analog neural network computing engine based on CMOS-compatible charge-trap transistor (CTT) is proposed in this paper. CTT devices are used as analog multipliers. Compared to digital multipliers, CTT-based analog multiplier shows…

High performance p- and n-type single-walled carbon nanotube (SWNT) field-effect transistors (FETs) are obtained by using high and low work function metals, Pd and Al as source/drain (S/D) electrodes respectively. Ohmic contacts made to…

Complementary-metal-oxide-semiconductor (CMOS) is the most widely spread technology for integrated circuits fabrication. Each foundry offers different technology nodes that are characterized by the minimum feature size, which is the…

Graphene nanoribbon (GNR) emerges as an exceptionally promising channel candidate due to its tunable sizable bandgap (0-3 eV), ultrahigh carrier mobility (up to 4600 cm^(2) V^(-1) s^(-1)), and excellent device performance (current on-off…