相关论文: Device Improvement and Circuit Performance Evaluat…

In this paper we have developed a two dimensional (2D) analytical model for surface potential and drain current for a long channel Dual Material Gate (DMG) Silicon-on-Insulator (SOI) Tunneling Field Effect Transistor (TFET). This model…

Dual-material double-gate tunnel field effect transistor (DMDG TFET) is a promising candidate for low-power, high-speed electronics due to enhanced electrostatic control and superior switching characteristics. Integrating a pocket region…

Topological insulator field-effect transistors (TIFETs) built on 2-D quantum spin Hall insulators are being considered as advanced logic transistors due to their potentially superior performance originating from the dissipationless edge…

In this work, the source structure of an n-type thin-film tunneling FET is engineered to get better performance. An ultra-thin SiGe along with Si is used in the source of silicon-based TFET. Two structures are compared with conventional…

Tunnel Field Effect Transistors (TFET) have extremely low leakage current, exhibit excellent subthreshold swing and are less susceptible to short channel effects. However, TFETs do face certain special challenges, particularly with respect…

In this paper, we have worked out a pseudo two dimensional (2D) analytical model for surface potential and drain current of a long channel p-type Dual Material Gate (DMG) Gate All-Around (GAA) nanowire Tunneling Field Effect Transistor…

In recent past extensive device simulation work has already been done on TFETs. Various ways have been suggested to model TFETs. In our paper we look at one such particular way to model these devices. The Non equilibrium green's formalism…

Tunneling field-effect transistors (TFETs) based on 2D materials are promising steep sub-threshold swing (SS) devices due to their tight gate control. There are two major methods to create the tunnel junction in these 2D TFETs: electrical…

Full-band atomistic quantum transport simulations based on first principles are employed to assess the potential of band-to-band tunneling FETs (TFETs) with a 2-D channel material as future electronic circuit components. We demonstrate that…

In this work, the performance of Tunnel Field-Effect Transistors (TFETs) based on two-dimensional Transition Metal Dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. One of the major challenges of…

Tunnel field effect transistor (TFET) devices are attractive as they show good scalability and have very low leakage current. However they suffer from low on-current and high threshold voltage. In order to employ the TFET for circuit…

Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…

Tunneling field-effect transistors (TFETs) have gained a great deal of recent interest due to their potential to reduce power dissipation in integrated circuits. One major challenge for TFETs so far has been achieving high drive currents,…

The band-to-band tunneling transistors have some performance advantages over the conventional MOSFETs due to the <60mV/dec sub-threshold slope. In this paper, carbon nanotubes are used as a model channel material to address issues that we…

In this work, we have investigated a 2D model of band-to-band tunneling based on 2-band model and implemented it using 2D NEGF formalism. Being 2D in nature, this model better addresses the variation in the directionality of the tunneling…

A new compact modeling approach is presented which describes the full current-voltage (I-V) characteristic of high-performance (aggressively scaled-down) tunneling field-effect-transistors (TFETs) based on homojunction direct-bandgap…

Thickness engineered tunneling field-effect transistors (TE-TFET) as a high performance ultra-scaled steep transistor is proposed. This device exploits a specific property of 2D materials: layer thickness dependent energy bandgap (Eg).…

Triple heterojunction (THJ) TFETs have been proposed to resolve the low ON-current challenge of TFETs. However, the design space for THJ-TFETs is limited by fabrication challenges with respect to device dimensions and material interfaces.…

This study simulated negative-capacitance double gate FinFETs with channel lengths ranging from 25nm to 100nm using TCAD. The results show that negative capacitance significantly reduces subthreshold swing as well as drain induced barrier…

The continuous scaling of semiconductor technology has pushed the footprint of logic devices below 50 nm. Currently, logic standard cells with one single fin are being investigated to increase the integration density, although such options…