相关论文: Cryogenic performance of field-effect transistors …
In this study, InSb nanowires have been formed by electrodeposition and integrated into NW-FETs. NWs were formed in porous anodic alumina (PAA) templates, with the PAA pore diameter of approximately 100 nm defining the NW diameter.…
Ability to understand and model the performance limits of nanowire transistors is the key to design of next generation devices. Here, we report studies on high-mobility junction-less gate-all-around nanowire field effect transistor with…
Large-scale quantum computing requires cryogenic electronic controllers such as control/readout circuit and routing circuit. However, current technologies face high power dissipation problems, hindering large-scale qubit integration. Here,…
Gate capacitances of back-gated nanowire field-effect transistors (NW-FETs) are calculated by means of finite element methods and the results are compared with analytical results of the ``metallic cylinder on an infinite metal plate…
Silicon-On-Insulator nanowire transistors of very small dimensions exhibit quantum effects like Coulomb blockade or single-dopant transport at low temperature. The same process also yields excellent field-effect transistors (FETs) for…
As CMOS structures are envisioned to host silicon spin qubits, and for co-integrating quantum systems with their classical control blocks, the cryogenic behaviour of such structures need to be investigated. In this paper we characterize the…
Cryogenic field-effect transistors (FETs) offer great potential for a wide range of applications, the most notable example being classical control electronics for quantum information processors. In the latter context, on-chip FETs with low…
The electronic properties and nanostructure of InAs nanowires are correlated by creating multiple field effect transistors (FETs) on nanowires grown to have low and high defect density segments. 4.2 K carrier mobilities are ~4X larger in…
Silicon nanowires (Si NW) are ideal candidates for solution processable field effect transistors (FETs). The interface between the nanowire channel and the gate dielectric plays a crucial role in the FET performance, and it can be…
Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature.…
Gate-all-around (GAA) nanowire (NW) field-effect transistor (FET) is a promising device architecture due to its superior gate controllability than that of the conventional FinFET architecture. The significantly higher electron mobility of…
Bottom-up grown nanomaterials play an integral role in the development of quantum technologies. Among these, semiconductor nanowires (NWs) are widely used in proof-of-principle experiments, however, difficulties in parallel processing of…
The impact of uni-axial compressive and tensile strain and diameter on the electronic band structure of indium arsenide (InAs) nanowires (NWs) is investigated using first principles calculations. Effective masses and band gaps are extracted…
At a superconductor (S)-normal metal (N) junction pairing correlations can "leak-out" into the N region. This proximity effect [1, 2] modifies the system transport properties and can lead to supercurrent flow in SNS junctions [3]. Recent…
New approaches such as selective area growth, where crystal growth is lithographically controlled, allow the integration of bottom-up grown semiconductor nanomaterials in large-scale classical and quantum nanoelectronics. This calls for…
The continued evolution of CMOS technology demands materials and architectures that emphasize low power consumption, particularly for computations involving large scale data processing and multivariable optimization. Ferroelectric materials…
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits; many novel device structures are being extensively explored. Among them, the silicon nanowire transistor (SNWT) has…
Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current…
The continuous miniaturisation of metal-oxide-semiconductor field-effect transistors (MOSFETs) from long- to short-channel architectures has advanced beyond the predictions of Moore's Law. Continued advances in semiconductor electronics,…
Semiconductor nanowire field-effect transistors represent a promising platform for the development of room-temperature (RT) terahertz (THz) frequency light detectors due to the strong nonlinearity of their transfer characteristics and their…