相关论文: Achieving short high-quality gate-all-around struc…

We use numerical simulations to analyze recent experimental measurements of short-channel carbon nanotube field-effect transistors with palladium contacts. We show that the gate strongly modulates the contact properties, an effect that is…

We have developed the combination of an etching and deposition technique that enables the fabrication of locally gated graphene nanostructures of arbitrary design. Employing this method, we have fabricated graphene nanoconstrictions with…

Building smaller transistors with enhanced functionality is critical in extending the limits of Moores law and meeting the demands of the electronics industry. Here we demonstrate transistor operation in a suspended single carbon nanotube…

Ramp-type junctions of $\rm Au-Bi_2Se_3-NbN$ were prepared on top of a bottom gate comprised of a $\rm SrTiO_3$ gate-insulator film on $\rm NbN$ gate-electrode layer on (100) $\rm SrTiO_3$ wafer. Two wafers with gate-insulator thickness of…

Vacuum nanodevices are devices that the electron transport through them is based on electron field emission from a nano-eimtter to another opposite electrode through a vacuum channel. Geometrically asymmetric metal-vacuum-metal structures…

We have fabricated single-electron transistors from individual metal nanoparticles using a geometry that provides improved coupling between the particle and the gate electrode. This is accomplished by incorporating a nanoparticle into a gap…

We present a novel reconfigurable metal-oxide-semiconductor multi-gate transistor that can host a quadruple quantum dot in silicon. The device consist of an industrial quadruple-gate silicon nanowire field-effect transistor. Exploiting the…

We propose a semi-suspended device structure and construct nanogapped, hysteresis-free field-effect transistors (FETs), based on the van der Waals stacking technique. The structure, which features a semi-suspended channel above a…

We present transport measurements in superconductor-nanowire devices with a gated constriction forming a quantum point contact. Zero-bias features in tunneling spectroscopy appear at finite magnetic fields, and oscillate in amplitude and…

A novel method for controlling nanowire magnetic properties and growth from filling time profile is presented. The wires are grown with an electrodeposition method ("Template synthesis") with a wide selection of pore diameters. We show that…

Gate-controlled supercurrent (GCS) in superconductor nanobridges has recently attracted attention as a means to create superconducting field effect transistors. Despite the clear advantage for applications with low power consumption and…

In this work, we simulate the expected device performance and the scaling perspectives of Carbon nanotube Field Effect Transistors (CNT-FETs), with doped source and drain extensions. The simulations are based on the self-consistent solution…

We present low-temperature measurements of low-loss superconducting nanowire-embedded resonators in the low-power limit relevant for quantum circuits. The superconducting resonators are embedded with superconducting nanowires with widths…

The advanced nanoscale integration available in silicon complementary metal-oxide-semiconductor (CMOS) technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot…

A large spin-dependent and electric field-tunable magnetoresistance of a two-dimensional electron system (2DES) is a key ingredient for the realization of many novel concepts for spin-based electronic devices. The low magnetoresistance…

Junctionless transistors made of silicon have previously been demonstrated experimentally and by simulations. Junctionless devices do not require fabricating an abrupt source-drain junction and thus can be easier to implement in aggressive…

The performance of field effect transistors based on an single graphene ribbon with a constriction and a single back gate are studied with the help of atomistic models. It is shown how this scheme, unlike that of traditional…

A vertical transistor based on a double gated, atomically thin heterojunction is theoretically examined. Both p-type and n-type transistor operations can be conveniently achieved by using one of the two gates as the switching gate. The…

Steep-slope $\beta$-Ga$_2$O$_3$ nano-membrane negative capacitance field-effect transistors (NC-FETs) are demonstrated with ferroelectric hafnium zirconium oxide in gate dielectric stack. Subthreshold slope less than 60 mV/dec at room…

We describe a method to fabricate clean suspended single-wall carbon nanotube (SWCNT) transistors hosting a single quantum dot ranging in length from a few 10s of nm down to $\approx$ 3 nm. We first align narrow gold bow-tie junctions on…