相关论文: Characterization and Modeling of 28-nm FDSOI CMOS …
In this paper a commercial 28-nm FDSOI CMOS technology is characterized and modeled from room temperature down to 4.2 K. Here we explain the influence of incomplete ionization and interface traps on this technology starting from the…
This paper reports the first cryogenic characterization of 28nm Fully-Depleted-SOI CMOS technology. A comprehensive study of digital/analog performances and body-biasing from room to the liquid helium temperature is presented. Despite a…
This paper presents the first experimental investigation and physical discussion of the cryogenic behavior of a commercial 28 nm bulk CMOS technology. Here we extract the fundamental physical parameters of this technology at 300, 77 and 4.2…
Cryogenic characterization and modeling of 0.18um CMOS technology (1.8V and 5V) are presented in this paper. Several PMOS and NMOS transistors with different width to length ratios(W/L) were extensively characterized under various bias…
Previous cryogenic electronics studies are most above 4.2K. In this paper we present the cryogenic characterization of a 0.18{\mu}m standard bulk CMOS technology(1.8V and 5V) at sub-kelvin temperature around 270mK. PMOS and NMOS devices…
Cryogenic CMOS technology (cryo-CMOS) offers a scalable solution for quantum device interface fabrication. Several previous works have studied the characterization of CMOS technology at cryogenic temperatures for various process nodes.…
Conventional CMOS technology operated at cryogenic conditions has recently attracted interest for its uses in low-noise electronics. We present one of the first characterizations of 180 nm CMOS technology at a temperature of 100 mK,…
This paper presents a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to strong inversion and in the linear and saturation regimes.…
On-chip thermometry at deep-cryogenic temperatures is vital in quantum computing applications to accurately quantify the effect of increased temperature on qubit performance. In this work, we present a sub-1 K temperature sensor in CMOS…
Cryogenic semiconductor device models are essential in designing control systems for quantum devices and in benchmarking the benefits of cryogenic cooling for high-performance computing. In particular, the saturation of subthreshold swing…
Semiconductor integrated circuits operated at cryogenic temperature will play an essential role in quantum computing architectures. These can offer equivalent or superior performance to their room-temperature counterparts while enabling a…
We report the design-technology co-optimization (DTCO) scheme to develop a 28-nm cryogenic CMOS (Cryo-CMOS) technology for high-performance computing (HPC). The precise adjustment of halo implants manages to compensate the threshold voltage…
This paper outlines the establishment of a generic cryogenic CMOS database in which key electrical parameters and transfer characteristics of the MOSFETs are quantified as functions of device size, temperature/frequency responses.…
Wide attention has been focused on cryogenic CMOS (Cryo-CMOS) operation because of its wide application and the improvement of CMOS performance. However, hot carrier degradation (HCD) becomes worsening at cryogenic temperature, which…
This paper presents the design and benchmarking of cryogenic bulk-FETs using an experimentally calibrated TCAD framework that integrates 2-D electrostatics and interface-trap effects from $T = 2$ K to 300 K. For a 28-nm node device, carrier…
This work presents a self-heating study of a 40-nm bulk-CMOS technology in the ambient temperature range from 300 K down to 4.2 K. A custom test chip was designed and fabricated for measuring both the temperature rise in the MOSFET channel…
This paper reports the experimental characterization at the cryogenic temperature of a compact mm-wave broadband single-pole single-throw (SPST) switch in 22nm FDSOI CMOS technology. The switch consists of two n-MOSFETs with a special…
The control interface of a large-scale quantum computer will likely require electronic sub-systems that operate in close proximity to the qubits, at deep cryogenic temperatures. Here, we report the low-temperature performance of custom…
Silicon carbide is a wide-bandgap semiconductor with an emerging CMOS technology platform and it is widely deployed in high power and harsh environment electronics. This material is also attracting interest for quantum technologies through…
The extremely low threshold voltage (Vth) of native MOSFETs (Vth~0V@300K) is conducive to the design of cryogenic circuits. Previous research on cryogenic MOSFETs mainly focused on the standard threshold voltage (SVT) and low threshold…