相关论文: Extended-p+ Stepped Gate (ESG) LDMOS for Improved …
This article is present the effected oxide capacitor in CMOS structure of integrated circuit level 5 micrometer technology. It has designed and basic structure of MOS diode. It establish with aluminum metallization layer by sputtering…
Accurate Channel State Information (CSI) prediction is essential for dynamic multiple-input multiple-output (MIMO) systems but remains computationally demanding. This letter proposes a resource-efficient predictor that combines a gated…
The rise of Extended Reality (XR) requires efficient streaming of 3D online worlds, challenging current 3DGS representations to adapt to bandwidth-constrained environments. This paper proposes LapisGS, a layered 3DGS that supports adaptive…
Electrical excitation of light using inelastic electron tunneling is a promising approach for the realization of ultra-compact on-chip optical sources with high modulation bandwidth. However, the practical implementation of these nanoscale…
Modern OLAP systems have mitigated I/O bottlenecks via storage-compute separation and columnar layouts, but CPU costs in the execution layer (especially Top-K selection and join probe) are emerging as new bottlenecks at scale. This paper…
Self-attention mechanisms have made striking state-of-the-art (SOTA) progress in various sequence learning tasks, standing on the multi-headed dot product attention by attending to all the global contexts at different locations. Through a…
Due to the long coherence time and efficient manipulation, the surface electron (SE) provides a perfect two-dimensional platform for quantum computation and quantum simulation. In this work, a theoretical scheme to realize the…
Gesture recognition based on surface electromyography (sEMG) has been gaining importance in many 3D Interactive Scenes. However, sEMG is easily influenced by various forms of noise in real-world environments, leading to challenges in…
Recent proposals using heterostructures of superconducting and either topologically insulating or semiconducting layers have been put forth as possible platforms for topological quantum computation. These systems are predicted to contain…
Excitation of localized surface plasmons (LSPs) of metal nanoparticles (NPs) residing on a flat metal film has attracted great attentions recently due to the enhanced electromagnetic (EM) fields found to be higher than the case of NPs on a…
We propose an alternating optimization framework for maximizing energy efficiency (EE) in reconfigurable intelligent surface (RIS) assisted distributed MIMO (D-MIMO) systems under both coherent and non-coherent reception modes. The…
Superconducting electronics represents a promising technology, offering not only efficient integration with quantum computing systems, but also the potential for significant power reduction in high-performance computing. Nonetheless, the…
An approach to utilize Low Energy Surface Flashover (LESF) for triggering the discharge in electric propulsion systems has been demonstrated. LESF uses conventional surface flashover mechanism with limited duration of high-current stage of…
We propose FPGA-Patch, the first-of-its-kind defense that leverages automated program repair concepts to thwart power side-channel attacks on cloud FPGAs. FPGA-Patch generates isofunctional variants of the target hardware by injecting…
Selective State Space Models (SSMs) achieve linear-time inference, yet their gradient-based sensitivity analysis remains bottlenecked by O(L) memory scaling during backpropagation. This memory constraint precludes genomic-scale modeling (L…
This work quantitatively evaluates the performance of event-based vision systems (EVS) against conventional RGB-based models for action prediction in collision avoidance on an FPGA accelerator. Our experiments demonstrate that the EVS model…
To date, the highest fidelity quantum logic gates between two qubits have been achieved with variations on the geometric-phase gate in trapped ions, with the two leading variants being the Molmer-Sorensen gate and the light-shift (LS) gate.…
This paper presents a high-throughput fault-resilient hardware implementation of AES S-box, called HFS-box. If a transient natural or even malicious fault in each pipeline stage is detected, the corresponding error signal becomes high and…
This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter…
This paper proposes the implementation of programmable threshold logic gate (TLG) crossbar array based on modified TLG cells for high speed processing and computation. The proposed TLG array operation does not depend on input signal and…