相关论文: Leakage Current Reduction Techniques in Poly-Si TF…

We introduce a silicon metal-oxide-semiconductor quantum dot architecture based on a single polysilicon gate stack. The elementary structure consists of two enhancement gates separated spatially by a gap, one gate forming a reservoir and…

Scan-based Design-for-Testability (DFT) measures are prevalent in modern digital integrated circuits to achieve high test quality at low hardware cost. With the advent of 3D heterogeneous integration and chiplet-based systems, the role of…

Throughout the world, the numbers of researchers or hardware designer struggle for the reducing of power dissipation in low power VLSI systems. This paper presented an idea of using the power gating structure for reducing the sub threshold…

The increasing number of control lines connecting quantum processors to external electronics constitutes a major bottleneck in the realization of large-scale quantum computers. Frequency-division multiplexing is expected to enable control…

Low power consumption in both static and dynamic modes of operation is a key requirement in modern, highly scaled nanoelectronics. Tunneling field-effect transistors (TFETs) that exploit direct band-to-band tunneling of charges and exhibit…

A simple laser scribing process has been developed to fabricate low-voltage junctionless in-plane-gate thin-film transistors (TFTs) arrays without any mask and photolithography. Such junctionless TFTs feature that the channel and the…

X-ray radiation hardness of FD-SOI n- and p-MOSFET has been investigated. After 1.4 kGy(Si) irradiation, 15% drain current increase for n-MOSFET and 20% drain current decrease for p-MOSFET are observed. From analysis of gmmax-Vsub, the…

Scalability of today's superconducting quantum computers is limited due to the huge costs of generating/routing microwave control pulses per qubit from room temperature. One active research area in both industry and academia is to push the…

The large volume change of the silicon (Si) during lithiation and delithiation process has long been a problem impeding its application as one of the most promising anode materials for LIBs. In this paper, we proposed a conceptually new…

Logic locking remains one of the most promising defenses against hardware piracy, yet current approaches often face challenges in scalability and design overhead. In this paper, we present TLGLock, a new design paradigm that leverages the…

In this work, we propose a new Stepped Oxide Hetero-Material Trench (SOHMT) power MOSFET with three sections in the trench gate (an N+ poly gate sandwiched between two P+ poly gates) and having different gate oxide thicknesses (increasing…

The electrified solid-liquid interface plays an essential role in many renewable energy-related applications, including hydrogen production and utilization. Limitations in computational modelling of the electrified solid-liquid interface…

In this work, we carried out an overlay-aware variation study on Flip FET (FFET) considering the impact on RC parasitics induced by the lithography misalignment in backside processes, and benchmarked it with CFET in terms of the…

This paper presents a new \b{eta}-Ga2O3 junctionless double gate Metal-Oxide-Field-Semiconductor-Effect-Transistor (\b{eta}DG-JL-FET) that a P+ packet embedded in the oxide layer (PO-\b{eta}DG-JL-FET) for high-voltage applications. Our goal…

After the Long Shutdown 2 the LHC will provide lead-lead collisions at interaction rates as high as 50kz. In order to cope with such conditions the ALICE Time Projection Chamber (TPC) needs to be upgraded. After the upgrade the TPC will run…

Tunneling field-effect transistors (TFETs) have gained a great deal of recent interest due to their potential to reduce power dissipation in integrated circuits. One major challenge for TFETs so far has been achieving high drive currents,…

Two modifications of the Thermally Stimulated Depolarization Current method are proposed to improve resolution and sensitivity of the method by connecting either a real capacitor, or an additional resistor in series with the sample. It is…

This work presents an original concept directed to implement an unconventional methodology where a device is produced by integrating a solid-state circuitry concept and an electrochemistry cell. In our experimental system an organic…

This paper presents and evaluates a novel method for generating power losses on transistors avoiding high currents. These could heat up the circuit tracks, affecting the accurate thermal modeling of the system. The proposed procedure is…

The most widely used method for monitoring Low Voltage Distribution Grids (LVDGs) is the three phase Weighted Least Squares (WLS) State Estimation (SE), which was initially developed for Medium Voltage Distribution Grids (MVDGs). This…