相关论文: Enhancement mode double top gated MOS nanostructur…
Coupled electron spins in semiconductor double quantum dots hold promise as the basis for solid-state qubits. To date, most experiments have used III-V materials, in which coherence is limited by hyperfine interactions. Ge/Si…
We report the fabrication and study of Hall bar MOSFET devices in which an overlapping-gate architecture allows four-terminal measurements of low-density 2D electron systems, while maintaining a high density at the ohmic contacts.…
We demonstrate a 12 quantum dot device fabricated on an undoped Si/SiGe heterostructure as a proof-of-concept for a scalable, linear gate architecture for semiconductor quantum dots. The device consists of 9 quantum dots in a linear array…
Confining electrons or holes in quantum dots formed in the channel of industry-standard fully depleted silicon-on-insulator CMOS structures is a promising approach to scalable qubit architectures. In this communication, we present…
We employ density functional theory to calculate the self consistent electronic structure, free energy and linear source-drain conductance of a lateral semiconductor quantum dot patterned via surface gates on the 2DEG formed at the…
We report the fabrication and electrical characterization of depletion-mode quantum dots in a two-dimensional hole gas (2DHG) in intrinsic silicon. We use fixed charge in a SiO$_2$/Al$_2$O$_3$ dielectric stack to induce a 2DHG at the…
We introduce a silicon metal-oxide-semiconductor quantum dot architecture based on a single polysilicon gate stack. The elementary structure consists of two enhancement gates separated spatially by a gap, one gate forming a reservoir and…
To improve mobility of fabricated silicon metal-oxide-semiconductor (MOS) quantum devices, forming gas annealing is a common method used to mitigate the effects of disorder at the Si/SiO2 interface. However, the importance of activation…
Silicon offers an attractive material platform for hardware realization of quantum computing. In this study, a microscopic stochastic simulation method is developed to model the effect of random interface charge traps in silicon…
Systems of quantum dots (QD) connected to leads exhibit periodic conductance peaks as a function of gate voltage arising from the Coulomb blockade effect \cite{review1,review2,review3}. Much effort goes into minimizing the size of QDs and…
We report a detailed study of low-temperature (mK) transport properties of a silicon double-dot system fabricated by phosphorous ion implantation. The device under study consists of two phosphorous nanoscale islands doped to above the…
Low temperature electron transport measurements of single electron transistors fabricated in advanced CMOS technology with polysilicon gates not only exhibit clear Coulomb blockade behavior but also show a large number of additional…
Among newly discovered two-dimensional (2D) materials, semiconducting ultrathin sheets of MoS2 show potential for nanoelectronics. However, the carrier mobility in MoS2 is limited by scattering from surface impurities and the substrate. To…
The quality of quantum bits (qubits) in silicon is highly vulnerable to charge noise that is omni-present in semiconductor devices and is in principle hard to be suppressed. For a realistically sized quantum dot system based on a…
We study low-temperature transport through carbon nanotube quantum dots in the Coulomb blockade regime coupled to niobium-based superconducting leads. We observe pronounced conductance peaks at finite source-drain bias, which we ascribe to…
A common issue in low temperature measurements of enhancement-mode metal-oxide-semiconductor (MOS) field-effect transistors (FETs) in the low electron density regime is the high contact resistance dominating the device impedance. In that…
We investigate coherent transport in Si:MOSFETs with nominal gate lengths 50 to 100nm and various widths at very low temperature. Independent of the geometry, localized states appear when G=e^{2}/h and transport is dominated by resonant…
Laterally coupled charge sensing of quantum dots is highly desirable, because it enables measurement even when conduction through the quantum dot itself is suppressed. In this work, we demonstrate such charge sensing in a double top gated…
Recent advances in semiconductor spin qubits have achieved linear arrays exceeding ten qubits. Moving to two-dimensional (2D) qubit arrays is a critical next step to advance towards fault-tolerant implementations, but it poses substantial…
Owing to the maturity of complementary metal oxide semiconductor (CMOS) microelectronics, qubits realized with spins in silicon quantum dots (QDs) are considered among the most promising technologies for building scalable quantum computers.…