相关论文: Enhancement mode double top gated MOS nanostructur…

A single-electron transistor has been realized in a Ga[Al]As heterostructure by oxidizing lines in the GaAs cap layer with an atomic force microscope. The oxide lines define the boundaries of the quantum dot, the in-plane gate electrodes,…

We experimentally study the transport properties of silicon quantum dots (QDs) fabricated from a highly doped n-type silicon-on-insulator wafer. Low noise electrical measurements using a low temperature complementary…

Scalable fault-tolerant quantum computer architectures require quantum gates that operate within a small fraction of the qubit decoherence time and with high accuracy over a bandwidth set by the decoherence rate. Electron spin quantum bits…

We investigate the tunability of electrostatic coupling between solid state quantum dots as building blocks for quantum bits. Specifically, our analysis is based upon two-dimensional electron systems (2DEG) and depletion by top gates. We…

A few-electron double quantum dot was fabricated using metal-oxide-semiconductor(MOS)-compatible technology and low-temperature transport measurements were performed to study the energy spectrum of the device. The double dot structure is…

We report gate-controlled quantum-dot transport in a trilayer MoSe2 device that combines a graphite back gate beneath the active region, a separate global gate for conductive access regions, and local top finger gates. In the low-backgate…

Extremely long coherence times, excellent single-qubit gate fidelities and two-qubit logic have been demonstrated with silicon metal-oxide-semiconductor spin qubits, making it one of the leading platforms for quantum information processing.…

Achieving stable, high-quality quantum dots has proven challenging within device architectures rooted in conventional solid-state device fabrication paradigms. In fact, these are grappled with complex protocols in order to balance ease of…

Universal quantum computation requires high fidelity single qubit rotations and controlled two qubit gates. Along with high fidelity single qubit gates, strong efforts have been made in developing robust two qubit logic gates in…

We report the realization of nanotube-based quantum dot structures that use local electrostatic gating to produce individually controllable dots in series along a nanotube. Electrostatic top-gates produce depletion regions in the underlying…

We report measurements of the cross-correlation between current noise fluctuations in two capacitively coupled quantum dots in the Coulomb blockade regime. The sign of the cross-spectral density is found to be tunable by gate voltage and…

Confining electrons or holes in quantum dots formed in the channel of industry-standard fully depleted silicon-on-insulator CMOS structures is a promising approach to scalable qubit architectures. In this article, we present our results on…

Achieving high-fidelity two-qubit gates is crucial for spin qubits in silicon double quantum dots. However, the two-qubit gates in experiments are easily suffered from charge noise, which is still a key challenge. Geometric gates which…

Scalability and performance of current flash memories can be improved substantially by replacing the floating poly-Si gate by a layer of Si dots. This multi-dot layer can be fabricated CMOS-compatibly in very thin gate oxide by ion beam…

Achieving uniform and scalable control of semiconductor spin qubits remains a key challenge for large scale quantum computing. In this work, we investigate how gate oxide thickness influences uniformity in dense two dimensional silicon…

Quantum ground states which arise at atomically controlled oxide interfaces provide an opportunity to address key questions in condensed matter physics, including the nature of two-dimensional (2D) metallic behaviour often observed adjacent…

We report on low temperature measurements in a fully tunable carbon nanotube double quantum dot. A new fabrication technique has been used for the top-gates in order to avoid covering the whole nanotube with an oxide layer as in previous…

The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for quantum bit (qubit) implementations. Taking advantage of existing CMOS integration technologies, such devices can offer a platform for…

We describe important considerations to create top-down fabricated planar quantum dots in silicon, often not discussed in detail in literature. The subtle interplay between intrinsic material properties, interfaces and fabrication processes…

Nanostructures in InAs quantum wells have so far remained outside of the scope of traditional microfabrication techniques based on etching. This is due to parasitic parallel conduction arising from charge carrier accumulation at the…