相关论文: Paving the Way for Pass Disturb Free Vertical NAND…

Single-port ferroelectric FET (FeFET) that performs write and read operations on the same electrical gate prevents its wide application in tunable analog electronics and suffers from read disturb, especially to the high-threshold voltage…

Several nanoelectronic devices have been already proved. However, no architecture which makes use of them provides a feasible opportunity to build medium/large systems. Nanoarchitecture proposals only solve a small part of the problems…

This paper summarizes our work on experimentally characterizing, mitigating, and recovering read disturb errors in multi-level cell (MLC) NAND flash memory, which was published in DSN 2015, and examines the work's significance and future…

Tunnel Field Effect Transistors (TFET) have extremely low leakage current, exhibit excellent subthreshold swing and are less susceptible to short channel effects. However, TFETs do face certain special challenges, particularly with respect…

Over the past decades, the relentless scaling and mass production of flash memory have underpinned the data-centric era. Yet charge-trap-based 3D NAND flash is now constrained by intrinsic physical and architectural limits, including…

We have previously discussed the design of a neutral atom quantum computer with an on-demand interaction [E. Hosseini Lapasar, et al., J. Phys. Soc. Jpn. 80, 114003 (2011)]. In this contribution, we propose an experimental method to…

The current work explores a geometrically engineered dual gate GaAs nanowire FET with state of the art miniaturized dimensions for high performance charge qubit operation at room temperature. Relevant gate voltages in such device can create…

We propose a novel solid-state disk (SSD) architecture that utilizes a double-data-rate synchronous NAND flash interface for improving read and write performance. Unlike the conventional design, the data transfer rate in the proposed design…

We present a new waveguided-sensing configuration combining the advantages of two effects, namely, two-wave interference and multiple-wave interference in a single sensing device. The sensor is accessed vertically from above by means of a…

We propose non-volatile memory (NVM) designs based on Piezoelectric Strain FET (PeFET) utilizing a piezoelectric/ferroelectric (PE/FE such as PZT) coupled with 2D Transition Metal Dichalcogenide (2D-TMD such as MoS2) transistor. The…

Neuromorphic vision sensors require efficient real-time pattern recognition, yet conventional architectures struggle with energy and latency constraints. Here, we present a novel in-situ spatiotemporal sequence detector that leverages…

Ferroelectric field effect transistor (FeFET) memory has shown the potential to meet the requirements of the growing need for fast, dense, low-power, and non-volatile memories. In this paper, we propose a memory architecture named…

For neutral atom qubits, the residual thermal motion of the cold atoms constitutes a major challenge that limits the accessible two-qubit gate fidelity. Recently, an interesting type of two-qubit controlled-PHASE quantum gate protocol has…

With the staggering increase of edge compute applications like Internet-of-Things (IoT) and artificial intelligence (AI), the demand for fast, energy-efficient on-chip memory is growing. While the fast and mature static random-access memory…

Non-volatile flip-flops (NVFFs) using power gating techniques promise to overcome the soaring leakage power consumption issue with the scaling of CMOS technology. Magnetic tunnel junction (MTJ) is a good candidate for constructing the NVFF…

Memory management is necessary with the increasing number of multi-connected AI devices and data bandwidth issues. For this purpose, high-speed multi-port memory is used. The traditional multi-port memory solutions are hard-bounded to a…

A vertical partial gate carbon nanotube (CNT) field-effect transistor (FET), which is amenable to the vertical CNT growth process and offers the potential for a parallel CNT array channel, is simulated using a self-consistent atomistic…

The complementary field-effect transistors (CFETs), featuring vertically stacked n/p-FETs, enhance integration density and significantly reduce the area of standard cells such as static random-access memory (SRAM). However, the advantage of…

We present a new fully self-aligned single-electron memory with a single pair of nano floating gates, made of different materials (Si and Ge). The energy barrier that prevents stored charge leakage is induced not only by quantum effects but…

We propose a scalable neutral atom quantum computer with an on-demand interaction through a selective two-qubit gate operation. Atoms are trapped by a lattice of near field Fresnel diffraction lights so that each trap captures a single…