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A counterclockwise hysteresis is observed at room temperature in the transfer characteristics of SrTiO$_3$ (STO) gated MoS$_2$ field effect transistor (FET) and attributed to bistable dipoles on the STO surface. The hysteresis is expectedly…

介观与纳米尺度物理 · 物理学 2024-10-22 Santu Prasad Jana , S Sreesanker , Suraina Gupta , Anjan K. Gupta

We investigate the origin of the hysteresis observed in the transfer characteristics of back-gated field-effect transistors with an exfoliated MoS2 channel. We find that the hysteresis is strongly enhanced by increasing either gate voltage,…

介观与纳米尺度物理 · 物理学 2017-10-24 Antonio Di Bartolomeo , Luca Genovese , Filippo Giubileo , Laura Iemmo , Giuseppe Luongo , Tobias Foller , Marika Schleberger

Clockwise to anti-clockwise hysteresis crossover in current-voltage transfer characteristics of field effect transistors (FETs) with graphene and MoS$_2$ channels holds significant promise for non-volatile memory applications. However such…

应用物理 · 物理学 2020-05-15 Himani Jawa , Abin Varghese , Saurabh Lodha

Randomly distributed traps at the MoS$_2$/SiO$_2$ interface result in non-ideal transport behavior, including hysteresis in MoS$_2$/SiO$_2$ field effect transistors (FETs). Thus traps are mostly detrimental to the FET performance but they…

介观与纳米尺度物理 · 物理学 2024-09-06 Santu Prasad Jana , Suraina Gupta , Anjan Kumar Gupta

MoS$_2$ field-effect transistors (FETs) with high-\textit{k} oxides currently lag behind silicon standards in bias and temperature stability due to ubiquitous border oxide traps that cause clockwise (CW) hysteresis in gate transfer…

A non-relaxing method based on cyclic gate bias stress is used to probe the interface or near-interface traps in the SiO$_2$/4H-SiC system over the whole 4H-SiC band gap. The temperature dependent instability of the threshold voltage in…

应用物理 · 物理学 2020-09-11 Patrick Fiorenza , Filippo Giannazzo , Mario Saggio , Fabrizio Roccaforte

We study field-effect transistors realized from VO2 nanobeams with HfO2 as the gate dielectric. When heated up from low to high temperatures, VO2 undergoes an insulator-to-metal transition. We observe a change in conductance (~ 6 percent)…

强关联电子 · 物理学 2011-09-30 Shamashis Sengupta , Kevin Wang , Kai Liu , Ajay K. Bhat , Sajal Dhara , Junqiao Wu , Mandar M. Deshmukh

Field-effect transistors based on molybdenum disulfide (MoS$_2$) exhibit a hysteresis in their transfer characteristics, which can be utilized to realize 2D memory devices. This hysteresis has been attributed to charge trapping due to…

A reversible handle on graphene carrier density, other than the gate electric field, is desirable for memory applications of graphene. Our experiments show that the commonly observed carrier density hysteresis in graphene on SiO$_2$ due to…

介观与纳米尺度物理 · 物理学 2017-06-16 Anil Kumar Singh , Anjan Kumar Gupta

Silicon nanowires (Si NW) are ideal candidates for solution processable field effect transistors (FETs). The interface between the nanowire channel and the gate dielectric plays a crucial role in the FET performance, and it can be…

介观与纳米尺度物理 · 物理学 2015-08-03 K. Prabha Rajeev , C. Opoku , V. Stolojan , M. Constantinou , M. Shkunov

The so-called Boltzmann Tyranny defines the fundamental thermionic limit of the subthreshold slope (SS) of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV/dec at room temperature and, therefore, precludes the lowering…

Graphene field effect transistors commonly comprise graphene flakes lying on SiO2 surfaces. The gate-voltage dependent conductance shows hysteresis depending on the gate sweeping rate/range. It is shown here that the transistors exhibit two…

介观与纳米尺度物理 · 物理学 2011-01-19 Haomin Wang , Yihong Wu , Chunxiao Cong , Jingzhi Shang , Ting Yu

Charge transport in MoS2 in the low carrier density regime is dominated by trap states and band edge disorder. The intrinsic transport properties of MoS2 emerge in the high density regime where conduction occurs via extended states. Here,…

介观与纳米尺度物理 · 物理学 2014-12-08 Leiqiang Chu , Hennrik Schmidt , Jiang Pu , Shunfeng Wang , Barbaros Özyilmaz , Taishi Takenobu , Goki Eda

We report the fabrication of back-gated field-effect transistors (FETs) using ultra-thin, mechanically exfoliated MoSe2 flakes. The MoSe2 FETs are n-type and possess a high gate modulation, with On/Off ratios larger than 106. The devices…

介观与纳米尺度物理 · 物理学 2013-01-04 S. Larentis , B. Fallahazad , E. Tutuc

The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation…

This work provides a detailed mapping of various mechanisms of surface-trap-induced gate leakage in GaN HEMTs across a temperature range from room to cryogenic levels. Two-dimensional variable-range hopping is observed at small gate bias.…

介观与纳米尺度物理 · 物理学 2025-10-17 Ching-Yang Pan , Shi-Kai Lin , Yu-An Chen , Pei-hsun Jiang

This paper reports on the physical and temperature-dependent electrical characterizations of the oxide/semiconductor interface in MOS capacitors with a SiO2 layer deposited on 4H-SiC using dichlorosilane and nitrogen-based vapor precursors.…

We study the effect of electric stress, gas pressure and gas type on the hysteresis in the transfer characteristics of monolayer molybdenum disulfide (MoS2) field effect transistors. The presence of defects and point vacancies in the MoS2…

This study illustrates the nature of electronic transport and its transition from one mechanism to another between a metal electrode and MoS2 channel interface in a field effect transistor (FET) device. Interestingly, measurements of the…

材料科学 · 物理学 2015-05-19 Faisal Ahmed , Min Sup Choi , Xiaochi Liu , Won Jong Yoo

This paper presents the design and benchmarking of cryogenic bulk-FETs using an experimentally calibrated TCAD framework that integrates 2-D electrostatics and interface-trap effects from $T = 2$ K to 300 K. For a 28-nm node device, carrier…

应用物理 · 物理学 2025-12-03 Nilesh Pandey , Dipanjan Basu , Sanjay K. Banerjee
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