相关论文: Negative Capacitance Enables FinFET Scaling Beyond…

Negative capacitance can be used to overcome the lower limit of subthreshold swing (SS) in field effect transistors (FETs), enabling ultralow-power microelectronics, though the concept of ferroelectric negative capacitance remains…

Recently, we proposed a novel transistor architecture for 3D stacked FETs called Flip FET (FFET), featuring N/P transistors back-to-back stacked and dual-sided interconnects. With dual-sided power rails and signal tracks, FFET can achieve…

We presents a data-calibrated compact model of carbon nanotube (CNT) field-effect transistors (CNFETs) based on the virtual-source (VS) approach, describing the intrinsic current-voltage and charge-voltage characteristics. The features of…

It is now widely accepted that the CMOS technology implementing irreversible logic will hit a scaling limit beyond 2016, and that the increased power dissipation is a major limiting factor. Reversible computing can potentially require…

For a capacitor made of a semiconducting carbon nanotube (CNT) suspended above a metallic gate, Coulomb correlations between individual electrons can lead to a capacitance that is much larger than the geometric capacitance. We argue that…

As silicon transistors scale toward future technology nodes, three-dimensional architectures -- including gate-all-around (GAA) nanoribbon and complementary field-effect transistors (CFETs) -- require channel widths in the tens of…

We present a data-calibrated compact model of carbon nanotube (CNT) field-effect transistors (CNFETs) including contact resistance, direct source-to-drain and band-to-band tunneling currents. The model captures the effects of dimensional…

The scaling behaviors of graphene nanoribbon (GNR) Schottky barrier field-effect transistors (SBFETs) are studied by solving the non-equilibrium Green's function (NEGF) transport equation in an atomistic basis set self-consistently with a…

Amorphous oxide semiconductors (AOSs) have recently gained attention as a promising channel material of back-end-of-line (BEOL)-compatible transistors for monolithic three-dimensional (3D) integrations. However, the degradation in device…

The complementary field-effect transistors (CFETs), featuring vertically stacked n/p-FETs, enhance integration density and significantly reduce the area of standard cells such as static random-access memory (SRAM). However, the advantage of…

We have performed numerical modeling of dual-gate ballistic n-MOSFET's with channel length of the order of 10 nm, including the effects of quantum tunneling along the channel and through the gate oxide. Our analysis includes a…

We analyze the distributions of electric potential and field, polarization and charge, and the differential capacitance of a silicon metal-oxide-ferroelectric field effect transistor (MOSFET), in which a gate insulator consists of thin…

Piezoelectric FET (PeFET) is a promising non-volatile-memory (NVM) device that integrates a piezoelectric (PE)/ferroelectric (FE) capacitor with a 2D transistor. It uses the polarization of the FE capacitor for bit-storage and…

Ultra-thin (UT) oxide semiconductors are promising candidates for back-end-of-line (BEOL) compatible transistors and monolithic three-dimensional integration. Experimentally, UT indium oxide (In$_2$O$_3$) field-effect transistors (FETs)…

Since many years, sub-60mV/decade switching has been reported in ferroelectric FETs. However, thus far these reports have lacked full physical explanation since they typically use a negative capacitance in the ferroelectric layer to be able…

We study the channel width scaling of back-gated MoS2 metal-oxide-semiconductor field-effect transistors (MOSFETs) from 2 {\mu}m down to 60 nm. We reveal that the channel conductance scales linearly with channel width, indicating no evident…

Extensive numerical calculations show that the capacitance of back-gated nanowires with various degrees of dielectric embeddings is accurately described with an effective dielectric constant as long as the difference between the dielectric…

Carbon nanotube field-effect transistors (CNFET) emerge as a promising alternative to CMOS transistors for the much higher speed and energy efficiency, which makes the technology particularly suitable for building the energy-hungry last…

High performance InGaAs gate-all-around (GAA) nanowire MOSFETs with channel length (Lch) down to 20nm have been fabricated by integrating a higher-k LaAlO3-based gate stack with an equivalent oxide thickness of 1.2nm. It is found that…

Atomistic density functional theory (DFT) calculations of the capacitance between a metallic cylindric gate and a carbon nanotube (CNT) are reported. Results stressing the predominant effect of quantum capacitance in limiting or even…