相关论文: Fabrication of Deep-Sub-Micrometer NbN/AlN/NbN Epi…

Increasing integration scale of superconductor electronics (SCE) requires employing kinetic inductors and self-shunted Josephson junctions (JJs) for miniaturizing inductors and JJs. We have been developing a ten-superconductor-layer…

To increase integration scale of superconductor electronics, we are developing a new, SFQ7ee, node of the fabrication process at MIT Lincoln Laboratory. In comparison to the existing SFQ5ee node, we increased the number of fully planarized…

A fabrication process for Nb/Al-AlOx/Nb Josephson junctions (JJs) with sizes down to 200 nm has been developed on a 200-mm-wafer tool set typical for CMOS foundry. This process is the core of several nodes of a roadmap for fully-planarized…

We present a new process for fabricating vertical NbN-MgO-NbN Josephson junctions using self-aligned silicon nitride spacers. It allows for a wide range of junction areas from 0.02 um^2 to several 100 um^2. At the same time, it is suited…

We present ferromagnetic Nb/Al2O3/Ni60Cu40/Nb Josephson junctions (SIFS) with an ultrathin Al2O3 tunnel barrier. The junction fabrication was optimized regarding junction insulation and homogeneity of current transport. Using…

Josephson tunnel junctions form the basis for various superconducting electronic devices. For this reason, enormous efforts are routinely taken to establish and later on maintain a scalable and reproducible wafer-scale manufacturing process…

The most developed integrated receivers for THz radiation nowadays are based on Josephson junction SIS devices. In this kind of devices, the highest receivable frequency is determined by the energy gap of the superconducting electrodes and…

We report the realization of multilayer three-dimensional nanobridge Josephson junctions based on Nb/NbN and Nb/TiN superconducting stacks fabricated using electron-beam lithography and chlorine-based dry etching. In this architecture, a…

We present a fabrication scheme and testing results for epitaxial sub-micrometer Josephson junctions. The junctions are made using a high-temperature (1170 K) "via process" yielding junctions as small as 0.8 mu m in diameter by use of…

To increase density of superconductor digital and neuromorphic circuits by 10x and reach integration scale of $10^8$ Josephson junctions (JJs) per chip, we developed a new fabrication process on 200-mm wafers, using self-shunted…

Nb/Al_2O_3/Ni_{0.6}Cu_{0.4}/Nb based superconductor-insulator-ferromagnet-superconductor (SIFS) Josephson tunnel junctions with a thickness step in the metallic ferromagnetic \Ni_{0.6}\Cu_{0.4} interlayer were fabricated. The step was…

Improving the coherence of superconducting qubits is a fundamental step towards the realization of fault-tolerant quantum computation. However, coherence times of quantum circuits made from conventional aluminium-based Josephson junctions…

We have developed a combined photolithography and electron-beam lithography fabrication process for sub-\mum to \mum-size Nb/Al-AlOx/Nb Josephson junctions. In order to define the junction size and protect its top electrode during anodic…

Josephson junction transistors and 50-junction arrays with linear junction dimensions from 200 nm down to 70 nm were fabricated from standard Nb/AlOx/Nb trilayers. The fabrication process includes electron beam lithography, dry etching,…

Atomic layer deposition (ALD) provides a promising approach for deposition of ultrathin low-defect-density tunnel barriers, and it has been implemented in a high-vacuum magnetron sputtering system for in situ deposition of ALD-Al2O3 tunnel…

In this work, we briefly overview various options for Josephson junctions which should be scalable down to nanometer range for utilization in nanoscale digital superconducting technology. Such junctions should possess high values of…

Superconductor-insulator-ferromagnet-superconductor (SIFS) Josephson tunnel junctions based on Nb\Al2O3\Ni\Cu\Nb stacks with a thickness step in the metallic NiCu interlayer were fabricated. The step height of a few 0.1 nm was defined by…

We explore novel junction configurations as an extension of our established Focused Ion Beam-based low TC SNS Junction fabrication technique. By milling a circular trench (diameter 1 micron, width 50 nm) in a 125 nm Nb 75 nm Cu bilayer we…

We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-mm wafers. The two junction layers can be, e.g., conventional…

Reproducible High Tc Josephson junctions have been made in a rather simple two-step process using ion irradiation. A microbridge 1 to 5 micrometers wide is firstly designed by ion irradiating a c-axis-oriented YBa2Cu3O7 film through a gold…