相关论文: Cryogenic MOSFET Threshold Voltage Model

The control interface of a large-scale quantum computer will likely require electronic sub-systems that operate in close proximity to the qubits, at deep cryogenic temperatures. Here, we report the low-temperature performance of custom…

This paper presents a novel approach utilizing a scalable neural decoder application-specific integrated circuit (ASIC) based on metal oxide memristors in a 180nm CMOS technology. The ASIC architecture employs in-memory computing with…

In this paper a commercial 28-nm FDSOI CMOS technology is characterized and modeled from room temperature down to 4.2 K. Here we explain the influence of incomplete ionization and interface traps on this technology starting from the…

We describe a liquid-cryogen free cryostat with ultra-low vibration levels which allows for continuous operation of a torsion balance at cryogenic temperatures. The apparatus uses a commercially available two-stage pulse-tube cooler and…

A scaled-up quantum computer will require a highly efficient control interface that autonomously manipulates and reads out large numbers of qubits, which for solid-state implementations are usually held at millikelvin (mK) temperatures.…

A model of a multilayer device with non-trivial geometrical structure and nonlinear dependencies of thermodynamic material properties at cryogenic temperatures is suggested. A considered device, called cryogenic cell, is intended for use in…

Large-scale cryogenic quantum systems are constrained by an input-output bottleneck between room-temperature electronics and millikelvin stages, particularly in superconducting qubit platforms. This bottleneck is most acute for output…

In the pursuit of quantum computing, solid-state quantum systems, particularly superconducting ones, have made remarkable advancements over the past two decades. However, achieving fault-tolerant quantum computing for next-generation…

We report the design-technology co-optimization (DTCO) scheme to develop a 28-nm cryogenic CMOS (Cryo-CMOS) technology for high-performance computing (HPC). The precise adjustment of halo implants manages to compensate the threshold voltage…

A MOSFET threshold voltage extraction method covering the entire range of drain-to-source voltage, from linear to saturation modes, is presented. Transconductance-to-current ratio is obtained from MOSFET transfer characteristics measured at…

This paper presents a fully-integrated CMOS temperature sensor for densely-distributed thermal monitoring in systems on chip supporting dynamic voltage and frequency scaling. The sensor front-end exploits a sub-threshold PMOS-based circuit…

Large-scale cryogenic Input-Output (IO) infrastructure is a requirement for realising fault-tolerant quantum computing in solid-state modalities. Such IO scaling presents significant challenges in thermal modelling, hardware design and…

When designing and studying circuits operating at cryogenic temperatures understanding local heating within the circuits is critical due to the temperature dependence of transistor and noise behavior. We have investigated local heating…

This brief reports the analytical modeling and measurements of the inflection in the MOSFET transfer characteristics at cryogenic temperatures. Inflection is the inward bending of the drain current versus gate voltage, which reduces the…

A cryogen-free cryostat cooled using a 4 K commercial GM or pulse tube cryocooler (PTC) displays temperature oscillations caused by the intrinsic working principle of the regenerative cryocooler. To dampen such oscillations usually requires…

We have developed a computer model for the simulation of resistive superconducting fault current limiters in three dimensions. The program calculates the electromagnetic and thermal response of a superconductor to a time-dependent overload…

Photonic integrated circuits (PICs) at cryogenic temperatures enable a wide range of applications in scalable classical and quantum systems for computing and sensing. A promising application of cryogenic PICs is to provide optical…

We describe a cryogenic instrumentation platform incorporating commercially-available field-programmable gate arrays (FPGAs) configured to operate well beyond their specified temperature range. The instrument enables signal routing,…

This paper presents a fully-integrated CMOS voltage reference designed in a 90 nm process node using low voltage threshold (LVT) transistor models. The voltage reference leverages subthreshold operation and near-weak inversion…

This work presents a physics based compact model for SiC power MOSFETs that accurately describes the I-V characteristics up to large voltages and currents. Charge-based formulations accounting for the different physics of SiC power MOSFETs…