相关论文: Diminished Short Channel Effects in Nanoscale Doub…

In this paper, we present the unique features exhibited by modified asymmetrical Double Gate (DG) silicon on insulator (SOI) MOSFET. The proposed structure is similar to that of the asymmetrical DG SOI MOSFET with the exception that the…

This paper examines the performance degradation of a MOS device fabricated on silicon-on-insulator (SOI) due to the undesirable short-channel effects (SCE) as the channel length is scaled to meet the increasing demand for high-speed…

Field-effect transistors (FETs) with single gates are adversely affected by short channel effects such as drain-induced barrier lowering (DIBL) and increases in the magnitude of sub-threshold swing as the channel length is reduced.…

In this paper we have developed a two dimensional (2D) analytical model for surface potential and drain current for a long channel Dual Material Gate (DMG) Silicon-on-Insulator (SOI) Tunneling Field Effect Transistor (TFET). This model…

Recently, short channel effects (SCE) and power consumption dissipation problems pose big challenges which need imperative actions to be taken to deal with for field effect transistor to further scale down as semiconductor technology enters…

Design considerations for a below 100 nm channel length SOI MOSFET with electrically induced shallow source/drain junctions are presented. Our simulation results demonstrate that the application of induced source/drain extensions to the SOI…

Fully depleted (FD) Silicon on Insulator (SOI) metal oxide Field Effect Transistor (MOSFET) Is the Leading Contender for Sun 65nm Regime. This paper presents a study of effects of work functions of metal gate on the performance of FD-SOI…

Two-dimensional (2D) layered materials-based field-effect transistors (FETs) are promising for ultimate scaled electron device applications because of the improved electrostatics to atomically thin body thickness. However, compared with the…

We have used a simple, analytically solvable model to analyze the characteristic s of dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with 10-nm-scale channel length L. The model assumes ballistic dynamics of 2D…

A dual mode device behaving either as a field-effect transistor or a single electron transistor (SET) has been fabricated using silicon-on-insulator metal oxide semiconductor technology. Depending on the back gate polarisation, an electron…

Dual-material double-gate tunnel field effect transistor (DMDG TFET) is a promising candidate for low-power, high-speed electronics due to enhanced electrostatic control and superior switching characteristics. Integrating a pocket region…

The doped silicon regions (tubs) in PWFDSOI MOSFET cause significant reduction in OFF current by reducing the number of carriers contributing to the OFF current. The emphasis of the simulation and device physics study on PWFDSOI MOSFET…

In this paper, a two-dimensional analytical model of a laterally graded-channel triple-metal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting of SiO$_2$ and HfO$_2$ is derived. The model…

Tunnel Field Effect Transistors (TFET) have extremely low leakage current, exhibit excellent subthreshold swing and are less susceptible to short channel effects. However, TFETs do face certain special challenges, particularly with respect…

In this letter, we demonstrate the integration of short metal nanoparticle chains (L \approx 700nm) supporting localized surface plasmons in Silicon On Insulator (SOI) waveguides at telecom wavelengths. Nanoparticles are deposited on the…

We have performed numerical modeling of dual-gate ballistic n-MOSFET's with channel length of the order of 10 nm, including the effects of quantum tunneling along the channel and through the gate oxide. Our analysis includes a…

The total ionizing dose irradiation (TID) effects of partially depleted (PD) silicon-on-insulator (SOI)devices which fabricated with a commercial 0.2 um SOI process are investigated. Experimental results show an original phenomenon that the…

We use numerical simulations to analyze recent experimental measurements of short-channel carbon nanotube field-effect transistors with palladium contacts. We show that the gate strongly modulates the contact properties, an effect that is…

Capacitance-Voltage (C-V) & Ballistic Current- Voltage (I-V) characteristics of Double Gate (DG) Silicon-on- Insulator (SOI) Flexible FETs having sub 35nm dimensions are obtained by self-consistent method using coupled Schrodinger- Poisson…

High performance enhancement mode semiconducting carbon nanotube field-effect transistors (CNTFETs) are obtained by combining ohmic metal-tube contacts, high dielectric constant HfO2 films as gate insulators, and electrostatically doped…