相关论文: 3D logic cells design and results based on Vertica…
With the staggering increase of edge compute applications like Internet-of-Things (IoT) and artificial intelligence (AI), the demand for fast, energy-efficient on-chip memory is growing. While the fast and mature static random-access memory…
Neuromorphic in-memory computing requires area-efficient architecture for seamless and low latency parallel processing of large volumes of data. Here, we report a compact, vertically integrated/stratified field-effect transistor (VSFET)…
This paper describes the design and characteristics of monolithically integrated three-terminal gated III-Nitride light emitting diodes (LEDs) devices. The impact of channel doping and thickness on the voltage penalty of the transistor-LED…
Carbon Nanotube Field Effect Transistor (CNFET) is a promising new technology that overcomes several limitations of traditional silicon integrated circuit technology. In recent years, the potential of CNFET for analog circuit applications…
In this paper, we demonstrate by simulation the general usability of an electrostatically doped and electrically reconfigurable planar field-effect transistor (FET) structure. The device concept is partly based on our already published and…
A new compact modeling approach is presented which describes the full current-voltage (I-V) characteristic of high-performance (aggressively scaled-down) tunneling field-effect-transistors (TFETs) based on homojunction direct-bandgap…
Semi-transparent photovoltaics (ST-PV) provide smart spatial solutions to integrate solar cells into already-built areas. Here, we study the potential of semiconductor nanowires (NWs) as promising ST-PV. We perform FDTD simulations for…
We introduce a novel logic style with self-checking capability to enhance hardware reliability at logic level. The proposed logic cells have two-rail inputs/outputs, and the functionality for each rail of outputs enables construction of…
We report the operation of a field-effect transistor based on a single InAs nanowire gated by an ionic liquid. Liquid gating yields very efficient carrier modulation with a transconductance value thirty time larger than standard back gating…
As conventional silicon technology is approaching its fundamental material and physical limits with continuous scaling, there is a growing push to look for new platform to design memory circuits for nanoelectronic applications. In this…
In this paper, we have worked out a pseudo two dimensional (2D) analytical model for surface potential and drain current of a long channel p-type Dual Material Gate (DMG) Gate All-Around (GAA) nanowire Tunneling Field Effect Transistor…
Long-range moire patterns in twisted WSe2 enable a built-in, moire-length-scale ferroelectric polarization that can be directly harnessed in electronic devices. Such a built-in ferroic landscape offers a compelling means to enable…
Multi-Valued Logic (MVL) has more than one logic level defined to represent data whereas binary logic has 2 logic levels. It has been shown that the MVL circuits use the circuit resources more effectively at different voltage levels with…
Bandstructure effects in the electronic transport of strongly quantized silicon nanowire field-effect-transistors (FET) in various transport orientations are examined. A 10-band sp3d5s* semi-empirical atomistic tight-binding model coupled…
In this study, InSb nanowires have been formed by electrodeposition and integrated into NW-FETs. NWs were formed in porous anodic alumina (PAA) templates, with the PAA pore diameter of approximately 100 nm defining the NW diameter.…
All-optical integrated circuits for computing and information processing have been pursued for decades as a potential strategy to overcome the speed limitations intrinsic to electronics. However feasible on-chip integrated logic units and…
Reconfigurable devices have garnered significant attention for alleviating the scaling requirements of conventional CMOS technology, as they require fewer components to construct circuits with similar function. Prior works required…
Integrated circuits (ICs) that can operate at high temperature have a wide variety of applications in the fields of automotive, aerospace, space exploration, and deep-well drilling. Conventional silicon-based complementary…
Using a tight-binding mode-space NEGF technique, we explore the essential physics, design and performance potential of the III-V core-shell (CS) nanowire (NW) heterojunction TFET. The CS TFET line-tunneling current increases significantly…
The first inversion-mode gate-all-around (GAA) III-V MOSFETs are experimentally demonstrated with a high mobility In0.53Ga0.47As channel and atomic-layer-deposited (ALD) Al2O3/WN gate stacks by a top-down approach. A well-controlled InGaAs…