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相关论文: Gate Dielectric Engineering with an Ultrathin Sili…

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Metal-oxide-semiconductor field-effect transistors (MOSFET's) using atomic-layer-deposited (ALD) Al$_2$O$_3$ as the gate dielectric are fabricated on the Si/Si$_{1-x}$Ge$_x$ heterostructures. The low-temperature carrier density of a…

介观与纳米尺度物理 · 物理学 2007-05-23 K. Lai , P. D. Ye , W. Pan , D. C. Tsui , S. A. Lyon , M. Muhlberger , F. Schaffler

Advanced logic transistors require gate dielectrics that achieve sub-nanometer equivalent oxide thickness (EOT), suppress leakage, and satisfy three key requirements: (i) compatibility with RMG-like high-temperature processing, (ii)…

Silicon carbide (SiC) metal-oxide-semiconductor field-effect-transistors (MOSFETs) enable high-voltage and high-temperature power conversion. Compared to Si devices, they suffer from pronounced gate leakage due to the reduced electron…

材料科学 · 物理学 2025-12-03 Ang Feng , Alexander Karl , Dominic Waldhör , Marina Avramenko , Peter Moens , Tibor Grasser

A widely used technique to mitigate the gate leakage in the ultra-scaled metal oxide semiconductor field effect transistors (MOSFETs) is the use of high-k dielectrics, which provide the same equivalent oxide thickness (EOT) as $\rm SiO_2$,…

介观与纳米尺度物理 · 物理学 2016-08-30 Mehdi Salmani-Jelodar , Hesameddin Ilatikhameneh , SungGeun Kim , Kwok Ng , Gerhard Klimeck

Two-dimensional (2D) semiconductors are widely recognized as attractive channel materials for low-power electronics. However, an unresolved challenge is the integration of high-quality, ultrathin high-\k{appa} dielectrics that fully meet…

Atomic layer deposition (ALD) is a key technique for the continued scaling of semiconductor devices, which increasingly relies on reproducible and scalable processes for interface manipulation of 3D structured surfaces on the atomic scale.…

Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for…

介观与纳米尺度物理 · 物理学 2017-06-01 Yuan Huang , Eli Sutter , Peter Sutter

Two-dimensional van der Waals semiconductors are promising for future nanoelectronics. However, integrating high-k gate dielectrics for device applications is challenging as the inert van der Waals material surfaces hinder uniform…

As we move beyond the era of transistor miniaturization, back-end-of-line-compatible transistors that can be stacked monolithically in the third dimension promise improved performance for low-power electronics. In advanced transistor…

Exploration of new dielectrics with large capacitive coupling is an essential topic in modern electronics when conventional dielectrics suffer from the leakage issue near breakdown limit. To address this looming challenge, we demonstrate…

Field-effect transistors (FETs) with single gates are adversely affected by short channel effects such as drain-induced barrier lowering (DIBL) and increases in the magnitude of sub-threshold swing as the channel length is reduced.…

材料科学 · 物理学 2026-04-22 Chankeun Yoon , Juhan Ahn , Yuchen Zhou , Jaydeep P. Kulkarni , Ananth Dodabalapur

In this work, we demonstrate scaled back-end-of-line (BEOL) compatible indium oxide (In2O3) transistors by atomic layer deposition (ALD) with channel thickness (Tch) of 1.0-1.5 nm, channel length (Lch) down to 40 nm, and equivalent oxide…

材料科学 · 物理学 2021-02-24 Mengwei Si , Zehao Lin , Adam Charnas , Peide D. Ye

In order to continue to improve integrated circuit performance and functionality, scaled transistors with short channel lengths and low thickness are needed. But the further scaling of silicon-based devices and the development of…

材料科学 · 物理学 2022-03-08 Mengwei Si , Zehao Lin , Zhizhong Chen , Xing Sun , Haiyan Wang , Peide D. Ye

Silicon ferroelectric field-effect transistors (FeFETs) with low-k interfacial layer (IL) between ferroelectric gate stack and silicon channel suffers from high write voltage, limited write endurance and large read-after-write latency due…

Since the 1960's when Gordon Moore proposed that the transistor density in our electronic devices should double every two years while the cost is halved, the semiconductor industry has taken this statement to heart. Over the last few…

材料科学 · 物理学 2022-07-27 Aditya Muralidharan

We present an improved fabrication process for overlapping aluminum gate quantum dot devices on Si/SiGe heterostructures that incorporates low-temperature inter-gate oxidation, thermal annealing of gate oxide, on-chip electrostatic…

We report dual-gate modulation of topological insulator field-effect transistors (TI FETs) made on Bi2Te3 thin flakes with integration of atomic-layer-deposited (ALD) Al2O3 high-k dielectric. Atomic force microscopy study shows that ALD…

材料科学 · 物理学 2011-08-08 Han Liu , Peide D. Ye

A femtosecond laser pulse is able to switch the magnetic state of a 3d-4f ferrimagnetic material on a pico-second time scale. Devices based on this all-optical switching (AOS) mechanism are competitive candidates for ultrafast memory…

This work demonstrates a large area process for atomically thin 2D semiconductors to unlock the technological upscale required for their commercial uptake. The new atomic layer deposition (ALD) and conversion technique yields large area…

We report on the interfacial electronic properties of HfO2 gate dielectrics both, with GaN towards normally-OFF recessed HEMT architectures and the AlGaN barrier for normally-ON AlGaN/GaN MISHEMTs for GaN device platforms on Si. A…

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