相关论文: A self-aligned nano-fabrication process for vertic…
We have developed a novel fabrication process for ultra-small, full-epitaxial NbN Josephson junctions on a silicon (Si) substrate. A full-epitaxial NbN/AlN/NbN tri-layer was grown on a Si (100) wafer with a (200)-oriented TiN buffer layer.…
Increasing integration scale of superconductor electronics (SCE) requires employing kinetic inductors and self-shunted Josephson junctions (JJs) for miniaturizing inductors and JJs. We have been developing a ten-superconductor-layer…
A fabrication process for Nb/Al-AlOx/Nb Josephson junctions (JJs) with sizes down to 200 nm has been developed on a 200-mm-wafer tool set typical for CMOS foundry. This process is the core of several nodes of a roadmap for fully-planarized…
To increase integration scale of superconductor electronics, we are developing a new, SFQ7ee, node of the fabrication process at MIT Lincoln Laboratory. In comparison to the existing SFQ5ee node, we increased the number of fully planarized…
We present a method for fabricating Josephson junctions and superconducting quantum interference devices (SQUIDs) which is based on the local anodization of niobium strip lines 3 to 6.5 nm-thick under the voltage-biased tip of an Atomic…
We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junctions, and one layer of MoNx kinetic inductors. The minimum…
We present a structure and a fabrication method for superconducting tunnel junctions down to the dimensions of 200 nm using i-line UV lithography. The key element is a side-wall-passivating spacer structure (SWAPS) which is shaped for…
We report the realization of multilayer three-dimensional nanobridge Josephson junctions based on Nb/NbN and Nb/TiN superconducting stacks fabricated using electron-beam lithography and chlorine-based dry etching. In this architecture, a…
To increase density of superconductor digital and neuromorphic circuits by 10x and reach integration scale of $10^8$ Josephson junctions (JJs) per chip, we developed a new fabrication process on 200-mm wafers, using self-shunted…
Reproducible High Tc Josephson junctions have been made in a rather simple two-step process using ion irradiation. A microbridge 1 to 5 micrometers wide is firstly designed by ion irradiating a c-axis-oriented YBa2Cu3O7 film through a gold…
In this work, we briefly overview various options for Josephson junctions which should be scalable down to nanometer range for utilization in nanoscale digital superconducting technology. Such junctions should possess high values of…
We present ferromagnetic Nb/Al2O3/Ni60Cu40/Nb Josephson junctions (SIFS) with an ultrathin Al2O3 tunnel barrier. The junction fabrication was optimized regarding junction insulation and homogeneity of current transport. Using…
Josephson junctions based on InAs semiconducting nanowires and Nb superconducting electrodes are fabricated in-situ by a special shadow evaporation scheme for the superconductor electrode. Compared to other metallic superconductors such as…
Vertical integration of superconducting electronics requires fabrication strategies that preserve pristine interfaces while accommodating oxidation-sensitive elemental superconductors. However, existing van der Waals-based vertical…
Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm$^2$ chips. Increasing the integration scale further is challenging…
Josephson tunnel junctions form the basis for various superconducting electronic devices. For this reason, enormous efforts are routinely taken to establish and later on maintain a scalable and reproducible wafer-scale manufacturing process…
We have developed a combined photolithography and electron-beam lithography fabrication process for sub-\mum to \mum-size Nb/Al-AlOx/Nb Josephson junctions. In order to define the junction size and protect its top electrode during anodic…
We have developed a new method to fabricate biepitaxial YBa2Cu3O(7-x) (YBCO) Josephson junctions at the nanoscale, allowing junctions widths down to 100 nm and simultaneously avoiding the typical damage in grain boundary interfaces due to…
We explore novel junction configurations as an extension of our established Focused Ion Beam-based low TC SNS Junction fabrication technique. By milling a circular trench (diameter 1 micron, width 50 nm) in a 125 nm Nb 75 nm Cu bilayer we…
Josephson junction transistors and 50-junction arrays with linear junction dimensions from 200 nm down to 70 nm were fabricated from standard Nb/AlOx/Nb trilayers. The fabrication process includes electron beam lithography, dry etching,…