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Single electron transistors (SETs) are fabricated by placing single walled carbon nanotubes (SWNTs) on a 100 nm wide local Al/Al2O3 bottom gate and then contacting with Pd electrodes. Coulomb oscillations up to 125 K were observed and…

介观与纳米尺度物理 · 物理学 2009-11-13 Paul Stokes , Saiful I. Khondaker

Single electron transistors (SETs) made from single wall carbon nanotubes (SWCNTs) are promising for quantum electronic devices operating with ultra-low power consumption and allow fundamental studies of electron transport. We report on…

介观与纳米尺度物理 · 物理学 2017-05-09 Nan Ai , Onejae Sul , Milan Begliarbekov , Qiang Song , Kitu Kumar , Daniel S. Choi , Eui-Hyeok Yang , Stefan Strauf

We describe a planar silicon metal-oxide-semiconductor (MOS) based single hole transistor, which is compatible with conventional Si CMOS fabrication. A multi-layer gate design gives independent control of the carrier density in the dot and…

介观与纳米尺度物理 · 物理学 2015-06-15 R. Li , F. E. Hudson , A. S. Dzurak , A. R. Hamilton

We report on a new type of single-electron transistor (SET) comprising two highly resistive Cr thin-film strips (~ 1um long) connecting a 1 um-long Al island to two Al outer electrodes. These resistors replace small-area oxide tunnel…

介观与纳米尺度物理 · 物理学 2009-10-31 V. A. Krupenin , A. B. Zorin , D. E. Presnov , M. N. Savvateev , J. Niemeyer

We report on the fabrication and electrical characterization at millikelvin temperatures of a novel silicon single-electron transistor (Si-SET). The island and source-drain leads of the Si-SET are formed by the implantation of phosphorus…

介观与纳米尺度物理 · 物理学 2007-05-23 V. C. Chan , D. R. McCamey , T. M. Buehler , A. J. Ferguson , D. J. Reilly , A. S. Dzurak , R. G. Clark , C. Yang , D. N. Jamieson

A simple and highly reproducible single electron transistor (SET) has been fabricated using gated silicon nanowires. The structure is a metal-oxide-semiconductor field-effect transistor made on silicon-on-insulator thin films. The channel…

介观与纳米尺度物理 · 物理学 2009-11-11 M. Hofheinz , X. Jehl , M. Sanquer , G. Molas , M. Vinet , S. Deleonibus

Low-dimensional materials such as layered semiconductors or carbon nanotubes (CNTs) have been attracting increasing attention in the last decades due to their inherent scaling properties, which become fundamental to sustain the scaling in…

介观与纳米尺度物理 · 物理学 2019-04-23 Marta Perucchini , Enrique G. Marin , Damiano Marian , Giuseppe Iannaccone , Gianluca Fiori

The advanced nanoscale integration available in silicon complementary metal-oxide-semiconductor (CMOS) technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot…

Three terminal single-electron transistor devices utilizing Al/Al2O3 gate electrodes were developed for the study of electron transport through individual single-molecule magnets. The devices were patterned via multiple layers of optical…

介观与纳米尺度物理 · 物理学 2009-11-13 J. J. Henderson , C. M. Ramsey , E. del Barco , A. Mishra , G. Christou

Silicon metal-oxide-semiconductor (MOS) spin qubits have become a promising platform for quantum information processing, with recent demonstrations of high-fidelity single and two-qubit gates. To move beyond a few qubits, however, more…

介观与纳米尺度物理 · 物理学 2020-03-10 Eduardo B. Ramirez , Francois Sfigakis , Sukanya Kudva , Jonathan Baugh

We have fabricated a custom cryogenic Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuit that has a higher measurement bandwidth compared with conventional room temperature electronics. This allowed implementing single shot…

We have performed numerical modeling of dual-gate ballistic n-MOSFET's with channel length of the order of 10 nm, including the effects of quantum tunneling along the channel and through the gate oxide. Our analysis includes a…

介观与纳米尺度物理 · 物理学 2009-10-31 Y. Naveh , K. K. Likharev

We study a single electron transistor (SET) based upon a II-VI semiconductor quantum dot doped with a single Mn ion. We present evidence that this system behaves like a quantum nanomagnet whose total spin and magnetic anisotropy depend…

介观与纳米尺度物理 · 物理学 2007-05-23 J. Fernandez-Rossier , R. Aguado

The single electron transistor (SET) offers unparalled opportunities as a nano-scale electrometer, capable of measuring sub-electron charge variations. SETs have been proposed for read-out schema in solid-state quantum computing where…

介观与纳米尺度物理 · 物理学 2007-05-23 Vincent I. Conrad , Andrew D. Greentree , David N. Jamieson , Lloyd C. L. Hollenberg

We investigate a silicon single-electron transistor (SET) in a metal-oxide-semiconductor (MOS) structure by applying a magnetic field perpendicular to the sample surface. The quantum dot is defined electrostatically in a point contact…

介观与纳米尺度物理 · 物理学 2015-05-13 Binhui Hu , C. H. Yang

Low temperature electron transport measurements of single electron transistors fabricated in advanced CMOS technology with polysilicon gates not only exhibit clear Coulomb blockade behavior but also show a large number of additional…

介观与纳米尺度物理 · 物理学 2014-01-08 Dharmraj Kotekar-Patil , Stefan Jauerneck , David Wharam , Dieter Kern , Xavier Jehl , Romain Wacquez , M. Sanquer

One of the biggest challenges impeding the progress of Metal-Oxide-Silicon (MOS) quantum dot devices is the presence of disorder at the Si/SiO$_2$ interface which interferes with controllably confining single and few electrons. In this work…

介观与纳米尺度物理 · 物理学 2019-02-20 Jin-Sung Kim , Thomas M. Hazard , Andrew A. Houck , Stephen A. Lyon

State-of-the-art quantum processors have recently grown to reach 100s of physical qubits. As the number of qubits continues to grow, new challenges associated with scaling arise, such as device variability reduction and integration with…

The current-voltage (I-V) characteristics of single-electron transistors (SETs) have been measured in various electromagnetic environments. Some SETs were biased with one-dimensional arrays of dc superconducting quantum interference devices…

介观与纳米尺度物理 · 物理学 2007-05-23 Michio Watanabe

This article is present the effected oxide capacitor in CMOS structure of integrated circuit level 5 micrometer technology. It has designed and basic structure of MOS diode. It establish with aluminum metallization layer by sputtering…

其他计算机科学 · 计算机科学 2009-12-22 S. Rodthong , B. Burapattanasiri
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