Related papers: III-V Gate-all-around Nanowire MOSFET Process Tech…

The first inversion-mode gate-all-around (GAA) III-V MOSFETs are experimentally demonstrated with a high mobility In0.53Ga0.47As channel and atomic-layer-deposited (ALD) Al2O3/WN gate stacks by a top-down approach. A well-controlled InGaAs…

Gate-all-around (GAA) nanowire (NW) field-effect transistor (FET) is a promising device architecture due to its superior gate controllability than that of the conventional FinFET architecture. The significantly higher electron mobility of…

High performance InGaAs gate-all-around (GAA) nanowire MOSFETs with channel length (Lch) down to 20nm have been fabricated by integrating a higher-k LaAlO3-based gate stack with an equivalent oxide thickness of 1.2nm. It is found that…

We report a method for making horizontal wrap-gate nanowire transistors with up to four independently controllable wrap-gated segments. While the step up to two independent wrap-gates requires a major change in fabrication methodology, a…

Gate-all-around Vertical Nanowire Field Effect Transistors (VNWFET) are emerging devices, which are well suited to pursue scaling beyond lateral scaling limitations around 7nm. This work explores the relative merits and drawbacks of the…

InGaAs gate-all-around nanowire MOSFETs with channel length down to 50nm have been experimentally demonstrated by top-down approach. The nanowire size-dependent transport properties have been systematically investigated. It is found that…

In this paper, 20nm - 80nm channel length (Lch) InGaAs gate- all-around (GAA) nanowire MOSFETs with record high on- state and off-state performance have been demonstrated by equivalent oxide thickness (EOT) and nanowire width (WNW) scaling…

We introduce a fabrication method for gate-all-around nanowire field-effect transistors. Single nanowires were aligned perpendicular to underlying bottom gates using a resist-trench alignment technique. Top gates were then defined aligned…

Recently, short channel effects (SCE) and power consumption dissipation problems pose big challenges which need imperative actions to be taken to deal with for field effect transistor to further scale down as semiconductor technology enters…

An important consideration in miniaturizing transistors is maximizing the coupling between the gate and the semiconductor channel. A nanowire with a coaxial metal gate provides optimal gate-channel coupling, but has only been realized for…

As we move beyond the era of transistor miniaturization, back-end-of-line-compatible transistors that can be stacked monolithically in the third dimension promise improved performance for low-power electronics. In advanced transistor…

In this paper, we have worked out a pseudo two dimensional (2D) analytical model for surface potential and drain current of a long channel p-type Dual Material Gate (DMG) Gate All-Around (GAA) nanowire Tunneling Field Effect Transistor…

This paper presents a self-consistent numerical model for calculating the charge profile and gate capacitance and therefore obtaining C-V characterization for a gate-all-around graded nanowire MOSFET with a high mobility axially graded…

We report the operation of a field-effect transistor based on a single InAs nanowire gated by an ionic liquid. Liquid gating yields very efficient carrier modulation with a transconductance value thirty time larger than standard back gating…

As CMOS structures are envisioned to host silicon spin qubits, and for co-integrating quantum systems with their classical control blocks, the cryogenic behaviour of such structures need to be investigated. In this paper we characterize the…

Nano-membrane tri-gate beta-gallium oxide (\b{eta}-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized…

Poly(ethylene imine) functionalized carbon nanotube thin films, prepared using the vacuum filtration method, were decorated with Au nanoparticles by in situ reduction of HAuCl4 under mild conditions. These Au nanoparticles were subsequently…

Silicon photonics is a rapidly developing technology that promises to revolutionize the way we communicate, compute, and sense the world. However, the lack of highly scalable, native CMOS-integrated light sources is one of the main factors…

GaAs was central to the development of quantum devices but is rarely used for nanowire-based quantum devices with InAs, InSb and SiGe instead taking the leading role. p-type GaAs nanowires offer a path to studying strongly-confined 0D and…

Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature.…