Related papers: III-V Gate-all-around Nanowire MOSFET Process Tech…
Ramp-type junctions of $\rm Au-Bi_2Se_3-NbN$ were prepared on top of a bottom gate comprised of a $\rm SrTiO_3$ gate-insulator film on $\rm NbN$ gate-electrode layer on (100) $\rm SrTiO_3$ wafer. Two wafers with gate-insulator thickness of…
The evolution of information technology has been driven by the discovery of new forms of large magnetoresistance (MR), such as giant magnetoresistance (GMR) and tunnelling magnetoresistance (TMR) in magnetic multilayers. Recently, new types…
The recent progress in nanosheet transistors has established two-dimensional (2D) semiconductors as viable candidates for future ultra-scaled electronic devices. Next to reducing contact resistance, identifying good gate dielectrics is a…
In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not…
The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation…
Ultrascaled GaSe field effect transistors are investigated through ab initio calculations. GaSe monolayers, 3 nm long, exhibit excellent performance with reduced short-channel effects and considerable high ON-current. Such device…
In this paper we present a detailed analysis of the atomic and electronic structure of GaAs nanowires using first-principles pseudopotential calculations. We consider six different types of nanowires with different diameters all grown along…
Applications such as augmented and virtual reality (AR/VR), optical atomic clocks, and quantum computing require photonic integration of (near-)visible laser sources to enable commercialization at scale. The heterogeneous integration of…
We have performed numerical modeling of dual-gate ballistic n-MOSFET's with channel length of the order of 10 nm, including the effects of quantum tunneling along the channel and through the gate oxide. Our analysis includes a…
Subwavelength semiconductor nanowires have recently attracted interest for photonic applications because they possess various unique optical properties and offer great potential for miniaturizing devices. However, realizing tight light…
Semiconductor nanowires (NWs) have a broad range of applications for nano- and optoelectronics. The strain field of gallium nitride (GaN) NWs could be significantly changed when contacts are applied to them to form a final device,…
Two-dimensional (2D) semiconductors have been suggested both for ultimately-scaled field-effect transistors (FETs) and More-than-Moore nanoelectronics. However, these targets can not be reached without accompanying gate insulators which are…
At sub-20nm technologies CMOS scaling faces severe challenges primarily due to fundamental device scaling limitations, interconnection overhead and complex manufacturing. Migration to 3D has been long sought as a possible pathway to…
Ultraviolet-C light-emitting diodes (UVC-LEDs) have great application in pathogen inactivation under various kinds of situations, especially in the fight against the COVID-19. Unfortunately, its epitaxial wafers are so far limited to 2-inch…
Advancing complementary metal-oxide-semiconductor (CMOS) technology into the sub-1-nm angstr\"om-scale technology nodes is expected to involve alternative semiconductor channel materials, as silicon transistors encounter severe performance…
We report on electronic transport in dual-gate, artificially stacked bilayer graphene field effect transistors (BiGFETs) fabricated from large-area chemical vapor deposited (CVD) graphene. The devices show enhanced tendency to current…
Axially-stacked quantum dots (QDs) in nanowires (NWs) have important applications in fabricating nanoscale quantum devices and lasers. Although their performances are very sensitive to crystal quality and structures, there is relatively…
Recent reports on machine learning (ML) and machine vision (MV) devices have demonstrated the potentials of 2D materials and devices. Yet, scalable 2D devices are being challenged by contact resistance and Fermi Level Pinning (FLP), power…
We present a simple fabrication technique for lateral nanowire wrap-gate devices with high capacitive coupling and field-effect mobility. Our process uses e-beam lithography with a single resist-spinning step, and does not require chemical…
Controlled and uniform assembly of "bottom-up" nanowire (NW) materials with high scalability has been one of the significant bottleneck challenges facing the potential integration of nanowires for both nano and macro electronic circuit…