Related papers: Silicon-On-Insulator Lateral Dual Sidewall Schottk…
In this paper, we report a new 4H-SiC Lateral Dual Sidewall Schottky (LDSS) rectifier on a highly doped drift layer consisting of a high-barrier sidewall Schottky contact on top of the low-barrier Schottky contact. Using two-dimensional…
A novel bipolar transistor structure, namely, a SiC emitter lateral NPM Schottky collector bipolar transistor (SCBT) with a silicon-on-insulator (SOI) substrate is explored using two-dimensional (2-D) simulation. A comprehensive comparison…
We report a new structure, called the Shielded Ohmic Contact (ShOC) rectifier which utilizes trenches filled with a high barrier metal to shield an Ohmic contact during the reverse bias. When the device is forward biased, the Ohmic contact…
600V/20A 4H-SiC Schottky barrier diodes (SBD) were fabricated to investigate the effect of key processing steps, especially before and after a formation of Schottky contact, on the electrical performances of SBD and on a long-term…
We benchmark Lumerical FDTD and Tidy3D for 3D simulations of passive silicon photonic components on the SOI platform. Six devices -- including an MMI, directional coupler, waveguide crossing, mode converter, polarization splitter rotator,…
Voltage doubler rectifiers are usually applied to systems with high voltage and low current requirement. An X band voltage doubler rectifier has been developed with 72% conversion efficiency. To the best of our knowledge, the obtained…
In this paper, we report an alternative approach of implementing a Schottky collector bipolar transistor without doping the ultrathin SOI film. Using different metal work function electrodes, the electrons and holes are induced in an…
This paper examines the performance degradation of a MOS device fabricated on silicon-on-insulator (SOI) due to the undesirable short-channel effects (SCE) as the channel length is scaled to meet the increasing demand for high-speed…
Dual topological insulators (DTIs) are simultaneously protected by time-reversal and crystal symmetries, representing advantageous alternatives to conventional topological insulators. By combining ab initio calculations and the…
Feeding the common-source amplifier output to the back-gate terminal in fully depleted silicon on insulator (FD-SOI) technology exploits the linearizing effect of negative feedback. Analysis and simulation results in 22 nm FD-SOI show that…
In this letter, we demonstrate high-performance lateral AlGaN/GaN Schottky barrier diodes (SBD) on Si substrate with a recessed-anode structure. The optimized rapid etch process provides results in improving etching quality with a 0.26-nm…
A new Schottky-gate Bipolar Mode Field Effect Transistor (SBMFET) is proposed and verified by two-dimensional simulation. Unlike in the case of conventional BMFET, which uses deep diffused p+-regions as the gate, the proposed device uses…
Graphene-silicon (GS) Schottky junctions have been demonstrated as an efficient architecture for photodetection. However, the response speed of such devices for free space light detection has so far been limited to 10's-100's of kHz for…
We design a resistive heater optimized for efficient and low-loss optical phase modulation in a silicon-on-insulator (SOI) waveguide and characterize the fabricated devices. Modulation is achieved by flowing current perpendicular to a new…
In this letter we discuss how the short channel behavior in sub 100 nm channel range can be improved by inducing a step surface potential profile at the back gate of an asymmetrical double gate (DG) Silicon-On-Insulator (SOI)…
Schottky barriers are often formed at the semiconductor/metal contacts and affect the electrical behaviour of semiconductor devices. In particular, Schottky barriers have been playing a major role in the investigation of the electrical…
In this paper, we present experimental results and simulation data of an electrostatically doped and therefore voltage-programmable, planar, CMOS-compatible field-effect transistor (FET) structure. This planar device is based on our…
We report on the electronic transport properties of multiple-gate devices fabricated from undoped silicon nanowires. Understanding and control of the relevant transport mechanisms was achieved by means of local electrostatic gating and…
The total ionizing dose irradiation (TID) effects of partially depleted (PD) silicon-on-insulator (SOI)devices which fabricated with a commercial 0.2 um SOI process are investigated. Experimental results show an original phenomenon that the…
A Silicon-on-insulator (SOI) perfectly vertical fibre-to-chip grating coupler is proposed and designed based on engineered subwavelength structures. The high directionality of the coupler is achieved by implementing step gratings to realize…