相关论文: The CMS Tracker Readout Front End Driver
This work presents a comprehensive characterization of the FERS 5202 front-end readout unit when processing signals from Silicon Photo-multipliers (SiPMs). The readout system's performance is characterized in terms of its charge resolution,…
This article presents the readout electronics of a novel beam monitoring system for ion research facility accelerator. The readout electronics are divided into Front-end Card (FEC) and Readout Control Unit (RCU). FEC uses Topmetal II minus…
We have implemented a cost-effective design for the readout electronics of both the anode wires and the cathode pads of large area proportional wire chambers for the HERA-B muon system based on the ASD-08 integrated circuit. To control and…
The high-luminosity upgrade of the LHC (HL-LHC) brings unprecedented requirements for precision bunch-by-bunch luminosity measurement and beam-induced background monitoring in real time. A key component of the CMS Beam Radiation…
In the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly compact mixed-signal chip has been designed in 130nm CMOS technology intended to read Silicon strip detectors for the experiments at the future…
A 64-channel mixed-mode ASIC, suitable for particle detectors of large dynamic range and high capacitance up to hundreds of pF, is presented here. Each channel features an analogue front-end for signal amplification and filtering, and a…
Edge detection is a fundamental image analysis task that underpins numerous high-level vision applications. Recent advances in Transformer architectures have significantly improved edge quality by capturing long-range dependencies, but this…
COFFEE series is a HVCMOS pixel sensor using the advanced 55 nm process, currently being developed for the Upstream Pixel (UP) tracker of the LHCb Upgrade II. To ensure that COFFEE will be able to handle the particle hit rates at UP…
The CMS tracker consists of two tracking systems utilizing semiconductor technology: the inner pixel and the outer strip detectors. The tracker detectors occupy the volume around the beam interaction region between 3 cm and 110 cm in radius…
We present our latest ASIC, which is used for the readout of Cadmium Telluride double-sided strip detectors (CdTe DSDs) and high spectroscopic imaging. It is implemented in a 0.35 um CMOS technology (X-Fab XH035), consists of 64 readout…
Multiple-Amplifier Sensing (MAS) charge-coupled devices (CCDs) have recently been shown to be promising silicon detectors that meet noise sensitivity requirements for next generation Stage-5 spectroscopic surveys and potentially, future…
The Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) is designed to study a wide range of high energy physics phenomena. It employs a large all-silicon tracker within a 3.8 T magnetic solenoid, which allows precise…
The Skipper CCD-in-CMOS Parallel Read-Out Circuit (SPROCKET) is a mixed-signal front-end design for the readout of Skipper CCD-in-CMOS image sensors. SPROCKET is fabricated in a 65 nm CMOS process and each pixel occupies a 50$\mu$m $\times$…
A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors. The system mainly consists of three kinds of modules: the ASIC card, the Adapter card and the Front-End Card (FEC). The…
The ALICE Forward Multiplicity Detector (FMD) is a silicon strip detector with 51,200 strips arranged in 5 rings, covering the range $-3.4 < \eta < 5.1$. It is placed around the beam pipe at small angles to extend the charged particle…
We present details of the design for the CCD readout electronics for the Subaru Telescope Prime Focus Spectrograph (PFS). The spectrograph is comprised of four identical spectrograph modules, each collecting roughly 600 spectra. The…
A complete dedicated electronics, from front-end to back-end, was developed to instrument a MIMAC prototype. A front end ASIC able to monitor 64 strips of pixels and to provide their individual "Time Over Threshold" information has been…
Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC…
We present the development of an automated testing system for the VMM hybrid of the RD51 collaboration. The VMM hybrid is a new front-end board for the RD51 common readout system, the Scalable Readout System, and will become the workhorse…
The \emph{MIDNA} application specific integrated circuit (ASIC) is a skipper-CCD readout chip fabricated in a 65 nm LP-CMOS process that is capable of working at cryogenic temperatures. The chip integrates four front-end channels that…