相关论文: 56 Gbps PCB Design Strategies for Clean, Low-Skew …
A systematic approach for high-speed via transition design is proposed. The effects of via barrel radius, anti-pad size, and the distance from adjacent stitching (GND) vias on bandwidth are analyzed and characterized. Guidelines for…
An earlier study of a high layer-count test board using plated-through-hole (PTH) vias and a limited quantity of laser vias was shown to be capable of supporting 112 Gb/s PAM-4 links (or equivalent signaling having 28 GHz (Nyquist)…
The traditional SerDes link simulation process begins with the extraction of printed circuit board (PCB) physical stripline and via models, followed by channel modeling and link simulation. We invert this simulation flow by first creating…
Variability analysis is important in successfully deploying multi-gigabit backplane printed wiring boards (PWBs) with growing numbers of high-speed SerDes links. We discuss the need for large sample sizes to obtain accurate variability…
In this paper, we present the design and realization of high bandwidth pickup electrodes with a cutoff frequency above 40 GHz. The proposed cone-shaped pickups are part of a bunch arrival-time monitor (BAM) designed for high (> 500 pC) and…
The recent research advances in deep learning have led to the development of small and powerful Convolutional Neural Network (CNN) architectures. Meanwhile Field Programmable Gate Arrays (FPGAs) has become a popular hardware target choice…
The sub-terahertz frequency band offers extremely large bandwidth and enables ultra-high data rates for future wireless applications. However, severe propagation loss and blockage significantly limit coverage at these frequencies.…
The projected sub-THz (100 - 300 GHz) part of the upcoming 6G standard will require a careful design of the waveform and choice of slot structure. Not only that the design of the physical layer for 6G will be driven by ambitious system…
Silicon pixel sensors manufactured using commercial CMOS processes are promising instruments for high-energy particle physics experiments due to their high yield and proven radiation hardness. As one of the essential factors for the…
Ubiquitous multicore processors nowadays rely on an integrated packet-switched network for cores to exchange and share data. The performance of these intra-chip networks is a key determinant of the processor speed and, at high core counts,…
Performance-enhancing mechanisms such as branch prediction, out-of-order execution, and return stack buffer (RSB) have been widely employed in today's modern processing units. Although successful in increasing the CPU performance,…
Packaging has become a crucial process due to the paradigm shift of More than Moore. Addressing manufacturing and yield issues is a significant challenge for modern layout algorithms. We propose to use printed circuit board (PCB) placement…
Physical layer network coding (PNC) has been studied to serve wireless network MIMO systems with much lower backhaul load than approaches such as Cloud Radio Access Network (Cloud-RAN) and coordinated multipoint (CoMP). In this paper, we…
The ubiquitous presence of printed circuit boards (PCBs) in modern electronic systems and embedded devices makes their integrity a top security concern. To take advantage of the economies of scale, today's PCB design and manufacturing are…
The upcoming 3GPP global mobile communication standard 6G strives to push the technological limits of radio frequency (RF) communication even further than its predecessors: Sum data rates beyond 100 Gbit/s, RF bandwidths above 1 GHz per…
Physical layer security has recently been regarded as an emerging technique to complement and improve the communication security in future wireless networks. The current research and development in physical layer security is often based on…
Field programmable gate arrays (FPGAs) provide designers with the ability to quickly create hardware circuits. Increases in FPGA configurable logic capacity and decreasing FPGA costs have enabled designers to more readily incorporate FPGAs…
Cost-effective embedded systems necessitate utilizing the single-wire communication protocol for inter-chip communication, thanks to its reduced pin count in comparison to the multi-wire I2C or SPI protocols. However, current single-wire…
Software defined radio (SDR) allows unprecedented levels of flexibility by transitioning the radio communication system from a rigid hardware platform to a more user-controlled software paradigm. However, it can still be time consuming to…
To enable a dense integration of model synapses in a spiking neural networks hardware, various nano-scale devices are being considered. Such a device, besides exhibiting spike-time dependent plasticity (STDP), needs to be highly scalable,…