相关论文: LOCld65, A Dual-Channel VCSEL Driver ASIC For Dete…

The development of a multiple-channel lock-in optical spectrometer (LIOS) is presented, which enables parallel phase-sensitive detection at the output of an optical spectrometer. The light intensity from a spectrally broad source is…

The Front End Driver, FED, is a 9U 400mm VME64x card designed for reading out the Compact Muon Solenoid, CMS, silicon tracker signals transmitted by the APV25 analogue pipeline Application Specific Integrated Circuits. The FED receives the…

The first generation of Single electron Sensitive Read Out (SiSeRO) amplifiers, employed as on-chip charge detectors for charge-coupled devices (CCDs) have demonstrated excellent noise and spectral performance: a responsivity of around 800…

Multiple-Amplifier Sensing (MAS) charge-coupled devices (CCDs) have recently been shown to be promising silicon detectors that meet noise sensitivity requirements for next generation Stage-5 spectroscopic surveys and potentially, future…

The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active…

We present the prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for high-luminosity LHC operation. This ASIC is based on a previously submitted demonstrator ASIC designed for timing…

Transition-edge sensors (TESs) are sensitive devices for detecting photons from millimeter radiation to gamma rays. Their photon counting efficiency and collecting area benefit from large-array multiplexing scheme, and therefore the…

We have developed a prototype system for the ILC vertex detector based on DEPFET pixels. The system operates a 128x64 matrix (with ~35x25 square micron large pixels) and uses two dedicated microchips, the SWITCHER II chip for matrix…

Vertical cavity Surface Emitting Laser (VCSEL) diodes emit light in two polarization modes. The amount of optical feedback is found to influence the intensities of the emitted modes. We investigate the effect of the amount of total output…

Low-Earth-orbit (LEO) inter-satellite links must cope with strongly doubly selective channels and aged channel state information (CSI). In this paper, the term ``sensing'' refers to the receiver-side identifiability of a small set of…

The need for a high-performance transceiver with high Signal to Noise Ratio (SNR) has driven the communication system to utilize the latest technique identified as oversampling systems. It was the most economical modulator and decimation in…

The Large High Altitude Air Shower Observatory (LHAASO) is designed for high energy gamma ray and cosmic ray detection. A Water Cherenkov Detector Array which is sensitive to gamma ray showers above a few hundred GeV is proposed to survey…

Security in modern RISC-V processors demands more than functional correctness: It requires resilience to side-channel attacks. This paper evaluates the vulnerability of the side channel of the CVA6 RISC-V core by analyzing software-based…

We present the architecture, design and first test results of SPIDER, the first prototype of a TSMC CMOS 65 nm ASIC designed for the time measurement path of LHCb Electromagnetic Calorimeter after LS4 Upgrade. The main requirements for the…

The increase in the number of readout channels in new detectors, like the Micro Pattern Gas Detectors (MPGD), in the order of several millions, requires a large amount of electrical power to supply the front-end electronics, up to hundreds…

The water Cherenkov detector array (WCDA) is one of the key detectors in the large high altitude air shower observatory (LHAASO), which is proposed for very high gamma ray source survey. In WCDA, there are more than 3000 photomultiplier…

1 ps timing resolution is the entry point to signature based searches relying on secondary/tertiary vertices and particle identification. We describe a preliminary design for PSEC5, an 8-channel 40 GS/s waveform-sampling ASIC in the TSMC 65…

A compact low-level RF (LLRF) control system based on RF system-on-chip (RFSoC) technology has been designed for the Advanced Concept Compact Electron Linear-accelerator (ACCEL) program, which has challenging requirements in both RF…

Demand for on-chip low-dropout regulators (LDOs) with both high power-supply rejection ratio (PSRR) and fast transient response is growing as system-on-chip (SoC) integration increases. However, conventional LDO architectures face…

We present the first single-input multiple-output (SIMO) receiver ASIC that jointly performs jammer mitigation, channel estimation, and data detection. The ASIC implements a recent algorithm called siMultaneous mitigAtion, Estimation, and…