相关论文: A 3.8 ps RMS time synchronization implemented in a…
High Level Synthesis (HLS) tools, like the Intel FPGA SDK for OpenCL, improve design productivity and enable efficient design space exploration guided by simple program directives (pragmas), but may sometimes miss important optimizations…
We propose an algorithm for carrying out joint frame and frequency synchronization in reduced-guard-interval coherent optical orthogonal frequency division multiplexing (RGI-CO-OFDM) systems. The synchronization is achieved by using the…
Efficient tuning of spin qubits remains a major bottleneck in scaling semiconductor quantum dot-based quantum processors. A key challenge is the rapid identification of gate voltage regimes suitable for qubit initialisation, control, and…
In the last decade, remarkable advances in integrated photonic technologies have enabled table-top experiments and instrumentation to be scaled down to compact chips with significant reduction in size, weight, power consumption, and cost.…
The problem of phase synchronization is to estimate the phases (angles) of a complex unit-modulus vector $z$ from their noisy pairwise relative measurements $C = zz^* + \sigma W$, where $W$ is a complex-valued Gaussian random matrix. The…
In this work, we propose a hybrid approach to synchronize large scale networks. In particular, we draw on Kalman Filtering (KF) along with time-stamps generated by the Precision Time Protocol (PTP) for pairwise node synchronization.…
Time-to-Digital Converters (TDCs) are major components for the measurements of time intervals. Recent developments in Field-Programmable Gate Array (FPGA) have enabled the opportunity to implement high-performance TDCs, which were only…
On modern field-programmable gate arrays (FPGAs), certain critical path portions of the designs might be prearranged into many multi-cell macros during synthesis. These movable macros with constraints of shape and resources lead to…
This paper presents the design and simulation results of a gigabit transceiver Application Specific Integrated Circuit (ASIC) called GBCR for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR has four upstream receiver…
In this paper, we propose LoopLynx, a scalable dataflow architecture for efficient LLM inference that optimizes FPGA usage through a hybrid spatial-temporal design. The design of LoopLynx incorporates a hybrid temporal-spatial architecture,…
We present a new method for developing time step controllers based on a technique from the field of machine learning. This method is applicable to stable time integrators that have an embedded scheme, i.e., that have local error estimation…
Achieving precise time synchronization in wireless systems is essential for both industrial applications and 5G, where sub-microsecond accuracy is required. However, since the Industrial Internet of Things (IIoT) market is negligible…
Accurate and fast-convergent time synchronization is very important for wireless sensor networks. The flooding time synchronization converges fast, but its transmission delay and by-hop error accumulation seriously reduce the…
Advancements in quantum computing underscore the critical need for sophisticated qubit readout techniques to accurately discern quantum states. This abstract presents our research intended for optimizing readout pulse fidelity for 2D and 3D…
A new Digital Pulse Processing (DPP) module has been developed, based on a domino ring sampler version 4 chip (DRS4), with good time resolution for LaBr3 detectors, and different digital timing analysis methods for processing the raw…
Mutual phase coherence is the most crucial factor in asynchronous optical sampling system, and its enhancement is commonly achieved by phase-locking both femtosecond lasers to a shared narrow-linewidth cavity-stabilized laser. Here we…
To mitigate spoofing attacks targeting global navigation satellite systems (GNSS) receivers, one promising method is to rely on alternative time sources, such as network-based synchronization, in order to detect clock offset discrepancies…
A prototype of DIRC-like Time-of-Flight detector (DTOF), including a pico-second time measurement electronics, is developed and tested preliminarily. The basic structure of DTOF is composed of a fused silica radiator connected to fast…
Accurate channel modeling is essential for realizing the potential of terahertz (THz) communications in 6G indoor networks, where existing models struggle with severe frequency selectivity and multipath effects. We propose a physically…
An estimation problem of fundamental interest is that of phase synchronization, in which the goal is to recover a collection of phases using noisy measurements of relative phases. It is known that in the Gaussian noise setting, the maximum…