相关论文: Construction of Fixed Rate Non-Binary WOM Codes ba…
Crossbar resistive memory with 1 Selector 1 Resistor (1S1R) structure is attractive for low-cost and high-density nonvolatile memory applications. As technology scales down to the single-nm regime, the increasing resistivity of…
We give a scheme for loss tolerantly building a linear optical quantum memory which itself is tolerant to qubit loss. We use the encoding recently introduced in [Phys. Rev. Lett. 97, 120501, (2006)] and give a method for efficiently…
Linear sequence modeling methods, such as linear attention, state space modeling, and linear RNNs, offer significant efficiency improvements by reducing the complexity of training and inference. However, these methods typically compress the…
A low-power Content-Addressable-Memory (CAM) is introduced employing a new mechanism for associativity between the input tags and the corresponding address of the output data. The proposed architecture is based on a recently developed…
In this paper, we consider weighted nonbinary repeat multiple-accumulate (WNRMA) code ensembles obtained from the serial concatenation of a nonbinary rate-1/n repeat code and the cascade of L>= 1 accumulators, where each encoder is followed…
Digital computing-in-memory (DCIM) has emerged as a promising solution for large language model (LLM) acceleration by minimizing data transfers between external DRAM and on-chip accelerators while maintaining high precision for superior…
In this paper, we propose a physical-layer rateless code for wireless channels. A novel rateless encoding scheme is developed to overcome the high error floor problem caused by the low-density generator matrix (LDGM)-like encoding scheme in…
In this paper, we focus on the design of binary constant weight codes that admit low-complexity encoding and decoding algorithms, and that have a size $M=2^k$. For every integer $\ell \geq 3$, we construct a $(n=2^\ell, M=2^{k_{\ell}},…
The problem of polar coding for an arbitrary sequence of independent binary-input memoryless symmetric (BMS) channels $\left\{W_i\right\}_{i=1}^{N}$ is considered. The sequence of channels is assumed to be completely known to both the…
The deployment of Large Language Models (LLMs) for real-time intelligence on edge devices is rapidly growing. However, conventional hardware architectures face a fundamental memory wall challenge, where limited on-device memory capacity and…
This paper investigates fundamental properties of nonlinear binary codes by looking at the codebook matrix not row-wise (codewords), but column-wise. The family of weak flip codes is presented and shown to contain many beautiful properties.…
Developing ultra-low-energy superconducting computing and fault-tolerant quantum computing will require scalable superconducting memory. While conventional superconducting logic-based memory cells have facilitated early demonstrations,…
Despite the impressive search rate of one key per clock cycle, the update stage of a random-access-memory-based content-addressable-memory (RAM-based CAM) always suffers high latency. Two primary causes of such latency include: (1) the…
Data shaping is a coding technique that has been proposed to increase the lifetime of flash memory devices. Several data shaping codes have been described in recent work, including endurance codes and direct shaping codes for structured…
Non-volatile memory (NVM) is a class of promising scalable memory technologies that can potentially offer higher capacity than DRAM at the same cost point. Unfortunately, the access latency and energy of NVM is often higher than those of…
Extended variants of the recently introduced spread unary coding are described. These schemes, in which the length of the code word is fixed, allow representation of approximately n^2 numbers for n bits, rather than the n numbers of the…
The maximum operational range of continuous variable quantum key distribution protocols has shown to be improved by employing high-efficiency forward error correction codes. Typically, the secret key rate model for such protocols is…
Non-volatile memory, such as resistive RAM (RRAM), is an emerging energy-efficient storage, especially for low-power machine learning models on the edge. It is reported, however, that the bit error rate of RRAMs can be up to 3.3% in the…
More-versatile memory is strongly desired for end-users to protect their information in the information era. In particular, bit-level switchable memory, from rewritable to read-only function, allows end-users to prevent any important data…
We introduce a unary coding of bosonic occupation states based on the famous "balls and walls" counting for the number of configurations of $N$ indistinguishable particles on $L$ distinguishable sites. Each state is represented by an…