Related papers: Nanoscale Field-Effect Transistors: An Ultimate Si…
We propose and analyze a novel dual-gate Spin Field Effect Transistor (SpinFET) with half-metallic ferromagnetic source and drain contacts. The transistor has two gate pads that can be biased independently. It can be switched ON or OFF with…
The doped silicon regions (tubs) in PWFDSOI MOSFET cause significant reduction in OFF current by reducing the number of carriers contributing to the OFF current. The emphasis of the simulation and device physics study on PWFDSOI MOSFET…
Two-dimensional (2D) layered materials-based field-effect transistors (FETs) are promising for ultimate scaled electron device applications because of the improved electrostatics to atomically thin body thickness. However, compared with the…
In this work, we simulate the expected device performance and the scaling perspectives of Carbon nanotube Field Effect Transistors (CNT-FETs), with doped source and drain extensions. The simulations are based on the self-consistent solution…
We study the transport properties of deeply scaled monolayer MoS2 n-channel metal-oxide-semiconductor field effect transistors (MOSFETs) using full-band ballistic quantum transport simulations with an atomistic tight-binding Hamiltonian…
Sub-10nm wide graphene nanoribbon field-effect transistors (GNRFETs) are studied systematically. All sub-10nm GNRs afforded semiconducting FETs without exception, with Ion/Ioff ratio up to 10^6 and on-state current density as high as…
In a recent Letter, Kravchenko et al. [cond-mat/9608101] have provided evidence for a metal-insulator transition (MIT) in a two-dimensional electron system (2DES) in Si metal-oxide-semiconductor field-effect transistors (MOSFETs). The…
Advancing complementary metal-oxide-semiconductor (CMOS) technology into the sub-1-nm angstr\"om-scale technology nodes is expected to involve alternative semiconductor channel materials, as silicon transistors encounter severe performance…
The possible existence of short-channel effects in oxide field-effect transistors is investigated by exploring field-effect transistors with various gate lengths fabricated from LaAlO$_3$-SrTiO$_3$ heterostructures. The studies reveal the…
We show that by adding only two fitting parameters to a purely ballistic transport model, we can accurately characterize the current-voltage characteristics of nanoscale MOSFETs. The model is an extension to a ballistic model (J. Appl.…
Using accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10 nm scaling for high-performance CMOS applications. We show that a combination of…
The design of a 1 micrometer gate length depletion-mode InSb quantum-well field-effect transistor (QWFET) with a 10 nm-thick Al2O3 gate dielectric has been optimized using a quantum corrected self-consistent Schrodinger-Poisson (QCSP) and…
Tunnel Field Effect Transistors (TFET) have extremely low leakage current, exhibit excellent subthreshold swing and are less susceptible to short channel effects. However, TFETs do face certain special challenges, particularly with respect…
In this paper we have developed a two dimensional (2D) analytical model for surface potential and drain current for a long channel Dual Material Gate (DMG) Silicon-on-Insulator (SOI) Tunneling Field Effect Transistor (TFET). This model…
Gate tunable p-type multilayer tin mono-sulfide (SnS) field-effect transistor (FET) devices with SnS thickness between 50 and 100 nm were fabricated and studied to understand their performances. The devices showed anisotropic inplane…
In this paper, we demonstrate by simulation the general usability of an electrostatically doped and electrically reconfigurable planar field-effect transistor (FET) structure. The device concept is partly based on our already published and…
We present a physics-based compact model for two-dimensional (2D) field-effect transistors (FETs) based on monolayer semiconductors such as MoS2. A semi-classical transport approach is appropriate for the 2D channel, enabling simplified…
A common issue in low temperature measurements of enhancement-mode metal-oxide-semiconductor (MOS) field-effect transistors (FETs) in the low electron density regime is the high contact resistance dominating the device impedance. In that…
We report the fabrication of back-gated field-effect transistors (FETs) using ultra-thin, mechanically exfoliated MoSe2 flakes. The MoSe2 FETs are n-type and possess a high gate modulation, with On/Off ratios larger than 106. The devices…
The electronic properties of a field-effect transistor with two different structures of MoSi$_2$N$_4$ and WSi$_2$N$_4$ monolayers as the channel material in the presence of biaxial strain are investigated. The band structures show that…