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Absence of an efficient technology of GaAs passivation limits the use of III-V semiconductors in modern electronics. The effect reported here can possibly lead to a solution of this long standing problem. We found that an electrically…
We show that carbon nanotube transistors exhibit scaling that is qualitatively different than conventional transistors. The performance depends in an unexpected way on both the thickness and the dielectric constant of the gate oxide.…
Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for…
Ohm's law provides a fundamental framework for understanding charge transport in conductors and underpins the concept of electrical scaling that has enabled the continuous advancement of modern CMOS technologies. As transistors are scaled…
In this paper, we report on the fabrication and the low-temperature characterization of extremely high-ohmic microstrip resistors made of a thin film of weakly oxidized titanium. Nearly linear voltage-current characteristics were measured…
The interest in MoS2 for radio-frequency (RF) application has recently increased. However, little is known on the scaling behavior of transistors made from MoS2 for RF applications, which is important for establishing performance limits for…
Low power consumption in both static and dynamic modes of operation is a key requirement in modern, highly scaled nanoelectronics. Tunneling field-effect transistors (TFETs) that exploit direct band-to-band tunneling of charges and exhibit…
Two-dimensional (2D) materials are particularly attractive to build the channel of next-generation field-effect transistors (FETs) with gate lengths below 10-15 nm. Because the 2D technology has not yet reached the same level of maturity as…
We have used a simple, analytically solvable model to analyze the characteristic s of dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with 10-nm-scale channel length L. The model assumes ballistic dynamics of 2D…
Two-dimensional (2D) semimetals beyond graphene have been relatively unexplored in the atomically-thin limit. Here we introduce a facile growth mechanism for semimetallic WTe2 crystals, then fabricate few-layer test structures while…
Silicon-based dielectric is crucial for many superconducting devices, including high-frequency transmission lines, filters, and resonators. Defects and contaminants in the amorphous dielectric and at the interfaces between the dielectric…
Thermal transistors that switch the thermal conductivity (\k{appa}) of the active layers are attracting increasing attention as thermal management devices. For electrochemical thermal transistors, several transition metal oxides (TMOs) have…
Transparent conducting oxides (TCOs) are essential for the optoelectronics industry, but there is a critical gap in cost-effective methods to rapidly deposit low sheet resistance, high transmittance films without damaging delicate…
Two dimensional (2D) crystal heterostructures are shown to possess a unique opportunity for novel THz nonlinear devices. In contrast to the oxide tunneling barrier, the uniformity of 2D insulators in the thickness control provides an ideal…
Like silicon-based semiconductor devices, van der Waals heterostructures will require integration with high-K oxides. This is needed to achieve suitable voltage scaling, improved performance as well as allowing for added functionalities.…
As metal-oxide-semiconductor field-effect transistors (MOSFET) channel lengths (Lg) are scaled to lengths shorter than Lg<8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario a heavier transport…
Transparent conducting oxides (TCOs) are essential components of optoelectronic devices and various materials have been explored for highly efficient TCOs having a combination of high transmittance and low sheet resistance. Here, we focus…
We demonstrate a technique for creating high quality, large area tunnel junction barriers for normal-insulating- superconducting or superconducting-insulating-superconducting tunnel junctions. We use atomic layer depo- sition and an…
High throughput experimental methods are known to accelerate the rate of research, development, and deployment of electronic materials. For example, thin films with lateral gradients in composition, thickness, or other parameters have been…
Atomic layer deposition (ALD) is a key technique for the continued scaling of semiconductor devices, which increasingly relies on reproducible and scalable processes for interface manipulation of 3D structured surfaces on the atomic scale.…