Related papers: Fabrication of 3D Packaging TSV using DRIE
Deep reactive ion etching (DRIE) with the Bosch process is one of the key procedures used to manufacture micron-sized structures for MEMS and microfluidic applications in silicon and, hence, of increasing importance for miniaturization in…
We demonstrate the fabrication of diffraction-limited dielectric metasurface lenses for NIR by use of standard industrial high throughput silicon processing techniques: UV Nano Imprint Lithography (UV-NIL) combined with continuous Reactive…
Deep reactive ion etching (DRIE) of borosilicate glass and profile control of an etched groove are reported. DRIE was carried out using an anodically bonded silicon wafer as an etching mask. We controlled the groove profile, namely…
This paper is about a new manufacturing process aimed at developing stable SiO2/Si3N4 patterned electrets using a Deep Reactive Ion Etching (DRIE) step for an application in electret-based Vibration Energy Harvesters (e-VEH). This process…
This paper is about a new manufacturing process aimed at developing stable SiO2/Si3N4 patterned electrets using a Deep Reactive Ion Etching (DRIE) step for an application in electret Vibration Energy Harvesters (VEH). Electrets charged by a…
The Through Silicon Via (TSV) process developed by Silex provides down to 30 micrometers pitch for through wafer connections in up to 600 micrometers thick substrates. Integrated with MEMS designs it enables significantly reduced die size…
In view of the integration of membrane resonators with more complex MEMS structures, we developed a general fabrication procedure for circular shape SiN$_x$ membranes using Deep Reactive Ion Etching (DRIE). Large area and high-stress…
Advances in material processing such as silicon micromachining are opening the way to vacuum microelectronics. Two-dimensional vacuum components can be fabricated using the microsystems processes. We developed such devices using a single…
In this work, a single crystal CVD diamond film with a novel three-dimensional (3D) interdigitated electrode geometry has been fabricated with the Reactive Ion Etching (RIE) technique in order to increase the charge collection efficiency…
Recent advances in fabrication have enabled radial-junction architectures for cost-effective and high-performance optoelectronic devices. Unlike a planar PN junction, a radial-junction geometry maximizes the optical interaction in the…
Application Specific Integrated Circuits (ASICs) are commonly used to efficiently process the signals from sensors and detectors in space. Wire bonding is a space qualified technique of making interconnections between ASICs and their…
Application Specific Integrated Circuits (ASICs) are used in space-borne instruments for signal processing and detector readout. The electrical interface of these ASICs to frontend printed circuit boards (PCBs) is commonly accomplished with…
Two dimensional (2D) integration has been the traditional approach for IC integration. Due to increasing demands for providing electronic devices with superior performance and functionality in more efficient and compact packages, has driven…
Future complementary metal oxide semiconductor (CMOS) scaling for advanced integrated circuit (IC) technologies may well depend on "More than Moore" (MtM) approaches using heterogeneous integration of semiconductor-based devices. In order…
The exciting field of stretchable electronics (SE) promises numerous novel applications, particularly in-body and medical diagnostics devices. However, future advanced SE miniature devices will require high-density, extremely stretchable…
Reducing token count is crucial for efficient training and inference of latent diffusion models, especially at high resolution. A common strategy is to build high-compression image tokenizers with more channels per token. However, when…
Increasing circuit complexity within quantum systems based on superconducting qubits necessitates high connectivity while retaining qubit coherence. Classical micro-electronic systems have addressed interconnect density challenges by using…
The extended Ptychographical Iterative Engine (ePIE) is a widely used phase retrieval algorithm for Electron Ptychography from 4-dimensional (4-D) Scanning Transmission Electron Microscopy (4-D STEM) measurements acquired with a focused or…
The semiconductor industry's rapid advancement pushes conventional two-dimensional technology to its utmost limitations in terms of scaling, performance, and cost factors. These challenges drive the usage of 3D technology in the production…
Rapid development in integrated optoelectronic devices and quantum photonic architectures creates a need for optical fiber to chip coupling with low losses. Here we present a fast and generic approach that allows temperature stable…