相关论文: FPGA Co-processor for the ALICE High Level Trigger

Nowadays, many companies possess various types of AI accelerators, forming heterogeneous clusters. Efficiently leveraging these clusters for high-throughput large language model (LLM) inference services can significantly reduce costs and…

The CMS experiment has been designed with a two-level trigger system: the Level-1 Trigger, implemented on custom-designed electronics, and the High Level Trigger, a streamlined version of the CMS offline reconstruction software running on a…

The reconstruction of charged particle trajectories is one of the most complex and CPU consuming parts of event processing in high energy experiments. At future hadron colliders such as the High-Luminosity Large Hadron Collider (HL-LHC) or…

The CMS experiment has been designed with a two-level trigger system: the Level 1 (L1) Trigger, implemented on custom-designed electronics, and the High Level Trigger (HLT), a streamlined version of the CMS reconstruction and analysis…

In this work we evaluate the potential of FPGAs for accelerating HPC workloads as a more power-efficient alternative to GPUs. Using High-Level Synthesis and a large set of optimization techniques, we show that FPGAs can achieve better…

Physics collisions at 13 TeV are expected at the LHC with an average of 40-50 proton-proton collisions per bunch crossing under nominal conditions. Tracking at trigger level is an essential tool to control the rate in high-pileup conditions…

Adopting FPGA as an accelerator in datacenters is becoming mainstream for customized computing, but the fact that FPGAs are hard to program creates a steep learning curve for software programmers. Even with the help of high-level synthesis…

The ALICE experiment at the Large Hadron Collider (LHC) proposes major detector upgrades to fully exploit the increase of the luminosity of the LHC in RUN~3 and to extend the physics reach for rare probes at low transverse momentum. The…

One of the major components of the Belle II trigger system is the neural network trigger. Its task is to estimate the z-Vertex particle tracks observed in the experiments drift chamber. The trigger is implemented on FPGAs to ensure…

As the complexity of digital circuits increases, High-Level Synthesis (HLS) is becoming a valuable tool to increase productivity and design reuse by utilizing relevant Electronic Design Automation (EDA) flows, either for…

The increasing demand of dedicated accelerators to improve energy efficiency and performance has highlighted FPGAs as a promising option to deliver both. However, programming FPGAs in hardware description languages requires long time and…

High-Level Synthesis (HLS) enables hardware design from C/C++ kernels but requires extensive transformations, such as restructuring code, inserting pragmas, adapting data types, and repairing non-synthesizable constructs, to achieve…

The ATLAS experiment at the Large Hadron Collider (LHC) will face the challenge of efficiently selecting interesting candidate events in $pp$ collisions at 14 TeV centre-of-mass energy, whilst rejecting the enormous number of background…

The CMS experiment will collect data from the proton-proton collisions delivered by the Large Hadron Collider (LHC) at a centre-of-mass energy up to 14 TeV. The CMS trigger system is designed to cope with unprecedented luminosities and LHC…

Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) tools promise to raise the level of abstraction by…

ALICE (A Large Ion Collider Experiment) is a detector designed to exploit the physics potential of nucleus-nucleus interactions at the LHC. Being a general purpose experiment, it will allow a comprehensive study of hadrons, electrons, muons…

High-Level Synthesis (HLS) plays a crucial role in modern hardware design by transforming high-level code into optimized hardware implementations. However, progress in applying machine learning (ML) to HLS optimization has been hindered by…

Particle physicists at the Large Hadron Collider investigate the properties of matter at subatomic length scales by colliding together bunches of high-energy protons and observing the decay products of the collisions. ATLAS is one of two…

High-Level Synthesis (HLS) has transformed the development of complex Hardware IPs (HWIP) by offering abstraction and configurability through languages like SystemC/C++, particularly for Field Programmable Gate Array (FPGA) accelerators in…

The fast reconstruction of charged particle tracks with high efficiency and track quality is an essential part of the online data selection for the ATLAS experiment at the High-Luminosity LHC. Dedicated custom designed hardware boards and…