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相关论文: SIAM: Chiplet-based Scalable In-Memory Acceleratio…

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Due to reduced manufacturing yields, traditional monolithic chips cannot keep up with the compute, memory, and communication demands of data-intensive applications, such as rapidly growing deep neural network (DNN) models. Chiplet-based…

硬件体系结构 · 计算机科学 2025-10-31 Lukas Pfromm , Alish Kanani , Harsh Sharma , Janardhan Rao Doppa , Partha Pratim Pande , Umit Y. Ogras

This paper focuses on the simulation of multi-die System-on-Chip (SoC) architectures using VisualSim, emphasizing chiplet-based system modeling and performance analysis. Chiplet technology presents a promising alternative to traditional…

硬件体系结构 · 计算机科学 2025-11-04 Wajid Ali , Ayaz Akram , Deepak Shankar

While deep neural network (DNN)-based video denoising has demonstrated significant performance, deploying state-of-the-art models on edge devices remains challenging due to stringent real-time and energy efficiency requirements.…

计算机视觉与模式识别 · 计算机科学 2025-05-29 Shan Gao , Zhiqiang Wu , Yawen Niu , Xiaotao Li , Qingqing Xu

Achieving high performance, energy efficiency, and cost-effectiveness while maintaining architectural flexibility is a critical challenge in the development and deployment of edge AI devices. Monolithic SoC designs struggle with this…

硬件体系结构 · 计算机科学 2026-04-08 Suhas Suresh Bharadwaj , Prerana Ramkumar

Current Artificial Intelligence (AI) computation systems face challenges, primarily from the memory-wall issue, limiting overall system-level performance, especially for Edge devices with constrained battery budgets, such as smartphones,…

硬件体系结构 · 计算机科学 2024-10-15 Lucas Huijbregts , Liu Hsiao-Hsuan , Paul Detterer , Said Hamdioui , Amirreza Yousefzadeh , Rajendra Bishnoi

With the recent growth in demand for large-scale deep neural networks, compute in-memory (CiM) has come up as a prominent solution to alleviate bandwidth and on-chip interconnect bottlenecks that constrain Von-Neuman architectures. However,…

硬件体系结构 · 计算机科学 2024-03-19 Souvik Kundu , Anthony Sarah , Vinay Joshi , Om J Omer , Sreenivas Subramoney

Developing accurate and reliable Compute-In-Memory (CIM) architectures is becoming a key research focus to accelerate Artificial Intelligence (AI) tasks on hardware, particularly Deep Neural Networks (DNNs). In that regard, there has been…

Large Language Models (LLMs) are becoming increasingly data-intensive due to growing model sizes, and they are becoming memory-bound as the context length and, consequently, the key-value (KV) cache size increase. Inference, particularly…

硬件体系结构 · 计算机科学 2025-11-18 Khyati Kiyawat , Zhenxing Fan , Yasas Seneviratne , Morteza Baradaran , Akhil Shekar , Zihan Xia , Mingu Kang , Kevin Skadron

Computing-in-memory (CIM) is renowned in deep learning due to its high energy efficiency resulting from highly parallel computing with minimal data movement. However, current SRAM-based CIM designs suffer from long latency for loading…

Vision Transformers (ViTs) have established new performance benchmarks in vision tasks such as image recognition and object detection. However, these advancements come with significant demands for memory and computational resources,…

硬件体系结构 · 计算机科学 2026-02-10 Cong Wang , Zexin Fu , Jiayi Huang , Shanshi Huang

SRAM-based Analog Compute-in-Memory (ACiM) demonstrates promising energy efficiency for deep neural network (DNN) processing. Nevertheless, efforts to optimize efficiency frequently compromise accuracy, and this trade-off remains…

硬件体系结构 · 计算机科学 2025-09-03 Wenlun Zhang , Shimpei Ando , Yung-Chin Chen , Kentaro Yoshioka

Neural networks (NNs) are growing in importance and complexity. A neural network's performance (and energy efficiency) can be bound either by computation or memory resources. The processing-in-memory (PIM) paradigm, where computation is…

硬件体系结构 · 计算机科学 2023-03-28 Geraldo F. Oliveira , Juan Gómez-Luna , Saugata Ghose , Amirali Boroumand , Onur Mutlu

Expanding Deep Learning applications toward edge computing demands architectures capable of delivering high computational performance and efficiency while adhering to tight power and memory constraints. Digital In-Memory Computing (DIMC)…

硬件体系结构 · 计算机科学 2026-02-03 Tommaso Spagnolo , Cristina Silvano , Riccardo Massa , Filippo Grillotti , Thomas Boesch , Giuseppe Desoli

Compute-In-Memory (CiM) is a promising solution to accelerate Deep Neural Networks (DNNs) as it can avoid energy-intensive DNN weight movement and use memory arrays to perform low-energy, high-density computations. These benefits have…

硬件体系结构 · 计算机科学 2024-11-01 Tanner Andrulis , Joel S. Emer , Vivienne Sze

Processing-in-memory (PIM) has shown extraordinary potential in accelerating neural networks. To evaluate the performance of PIM accelerators, we present an ISA-based simulation framework including a dedicated ISA targeting neural networks…

硬件体系结构 · 计算机科学 2024-02-29 Xinyu Wang , Xiaotian Sun , Yinhe Han , Xiaoming Chen

This paper presents a 3D-stacked chiplets based large language model (LLM) inference accelerator, consisting of non-volatile in-memory-computing processing elements (PEs) and Inter-PE Computational Network (IPCN), interconnected via silicon…

硬件体系结构 · 计算机科学 2025-11-07 Yue Jiet Chong , Yimin Wang , Zhen Wu , Xuanyao Fong

Recently, analog compute-in-memory (CIM) architectures based on emerging analog non-volatile memory (NVM) technologies have been explored for deep neural networks (DNN) to improve energy efficiency. Such architectures, however, leverage…

信号处理 · 电气工程与系统科学 2020-08-07 Zhe Wan , Tianyi Wang , Yiming Zhou , Subramanian S. Iyer , Vwani P. Roychowdhury

The ever-increasing computation complexity of fast-growing Deep Neural Networks (DNNs) has requested new computing paradigms to overcome the memory wall in conventional Von Neumann computing architectures. The emerging Computing-In-Memory…

硬件体系结构 · 计算机科学 2021-07-21 Kaining Zhou , Yangshuo He , Rui Xiao , Kejie Huang

With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms have evolved in two diverse directions -- one with ever-increasing connection density for better accuracy and the other with more compact sizing for energy…

硬件体系结构 · 计算机科学 2021-07-07 Gokul Krishnan , Sumit K. Mandal , Chaitali Chakrabarti , Jae-sun Seo , Umit Y. Ogras , Yu Cao

Chiplet architectures are on the rise as they promise to overcome the scaling challenges of monolithic chips. A key component of such architectures is an efficient inter-chiplet interconnect (ICI). The ICI design space is huge as there are…

硬件体系结构 · 计算机科学 2025-03-19 Patrick Iff , Benigna Bruggmann , Blaise Morel , Maciej Besta , Luca Benini , Torsten Hoefler
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