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This paper presents a novel, non-standard set of vector instruction types for exploring custom SIMD instructions in a softcore. The new types allow simultaneous access to a relatively high number of operands, reducing the instruction count…

硬件体系结构 · 计算机科学 2021-06-15 Philippos Papaphilippou , Paul H. J. Kelly , Wayne Luk

As RISC-V adoption accelerates, domains such as automotive, the Internet of Things (IoT), and industrial control are attracting growing attention. These domains are subject to stringent Size, Weight, Power, and Cost (SWaP-C) constraints,…

Heterogeneous, multicore SoC architectures are a critical component of today's computing landscape. However, supporting both increasing heterogeneity and multicore execution are significant design challenges. Meanwhile, the growing RISC-V…

硬件体系结构 · 计算机科学 2022-06-07 Joseph Zuckerman , Paolo Mantovani , Davide Giri , Luca P. Carloni

Vitamin-V is a project funded under the Horizon Europe program for the period 2023-2025. The project aims to create a complete open-source software stack for RISC-V that can be used for cloud services. This software stack is intended to…

RISC-V is an open instruction set architecture recently developed for embedded real-time systems. To achieve a lasting security on these systems and design efficient countermeasures, a better understanding of vulnerabilities to novel and…

密码学与安全 · 计算机科学 2022-11-30 Olivier Gilles , Franck Viguier , Nikolai Kosmatov , Daniel Gracia Pérez

The Internet of Things (IoT) is an ongoing technological revolution. Embedded processors are the processing engines of smart IoT devices. For decades, these processors were mainly based on the Arm instruction set architecture (ISA). In…

密码学与安全 · 计算机科学 2021-07-12 Tao Lu

RISC-V is an open and royalty free instruction set architecture which has been developed at the University of California, Berkeley. The processors using RISC-V can be designed and released freely. Because of this, various processor cores…

硬件体系结构 · 计算机科学 2020-03-30 Junya Miura , Hiromu Miyazaki , Kenji Kise

Domain-Specific architectures with accelerators for machine learning and signal processing require efficient bulk data movement and high-bandwidth access to large datasets. Such capabilities are often absent from minimal open-source…

硬件体系结构 · 计算机科学 2026-03-16 Philippe Sauter , Thomas Benz , Paul Scheffler , Luca Benini

RISC-V, an open instruction set architecture, is getting the attention of soft processor developers. Implementing only a basic 32-bit integer instruction set of RISC-V, which is defined as RV32I, might be satisfactory for embedded systems.…

硬件体系结构 · 计算机科学 2020-11-02 Md Ashraful Islam , Hiromu Miyazaki , Kenji Kise

Recently, embedded systems have not only requirements for hard real-time behavior and reliability, but also diversified functional demands, such as network functions. To satisfy these requirements, virtualization using hypervisors is…

操作系统 · 计算机科学 2018-10-12 Takumi Shimada , Takeshi Yashiro , Ken Sakamura

RISC-V provides a flexible and scalable platform for applications ranging from embedded devices to high-performance computing clusters. Particularly, its RISC-V Vector Extension (RVV) becomes of interest for the acceleration of AI…

机器学习 · 计算机科学 2025-08-20 Federico Nicolas Peccia , Frederik Haxel , Oliver Bringmann

The emergence of a new, open, and free instruction set architecture, RISC-V, has heralded a new era in microprocessor architectures. Starting with low-power, low-performance prototypes, the RISC-V community has a good chance of moving…

Vector architectures are gaining traction for highly efficient processing of data-parallel workloads, driven by all major ISAs (RISC-V, Arm, Intel), and boosted by landmark chips, like the Arm SVE-based Fujitsu A64FX, powering the TOP500…

硬件体系结构 · 计算机科学 2025-01-10 Matteo Perotti , Matheus Cavalcante , Nils Wistoff , Renzo Andri , Lukas Cavigelli , Luca Benini

RISC-V is a recently developed open instruction set architecture gaining a lot of attention. To achieve a lasting security on these systems and design efficient countermeasures, a better understanding of vulnerabilities to novel and…

密码学与安全 · 计算机科学 2023-07-25 Loïc Buckwell , Olivier Gilles , Daniel Gracia Pérez , Nikolai Kosmatov

One of the biggest concerns in IoT is privacy and security. Encryption and authentication need big power budgets, which battery-operated IoT end-nodes do not have. Hardware accelerators designed for specific cryptographic operations provide…

硬件体系结构 · 计算机科学 2020-10-01 Ömer Faruk Irmak , Arda Yurdakul

In the context of the Horizon Europe project, METASAT, a hardware platform was developed as a prototype of future space systems. The platform is based on a multiprocessor NOEL-V, an established space-grade processor, which is integrated…

硬件体系结构 · 计算机科学 2025-03-03 Marc Solé i Bonet , Jannis Wolf , Leonidas Kosmidis

The automotive industry is experiencing a massive paradigm shift. Cars are becoming increasingly autonomous, connected, and computerized. Modern electrical/electronic (E/E) architectures are pushing for an unforeseen functionality…

密码学与安全 · 计算机科学 2024-10-15 Sandro Pinto , Jose Martins , Manuel Rodriguez , Luis Cunha , Georg Schmalz , Uwe Moslehner , Kai Dieffenbach , Thomas Roecker

The new open and royalty-free RISC-V ISA is attracting interest across the whole computing continuum, from microcontrollers to supercomputers. High-performance RISC-V processors and accelerators have been announced, but RISC-V-based HPC…

RISC-V cores have gained a lot of popularity over the last few years. However, being quite a recent and novel technology, there is still a gap in the availability of comprehensive simulation frameworks for RISC-V that cover both the…

Open-source RISC-V cores are increasingly demanded in domains like automotive and space, where achieving high instructions per cycle (IPC) through superscalar and out-of-order (OoO) execution is crucial. However, high-performance…

硬件体系结构 · 计算机科学 2025-06-02 Zexin Fu , Riccardo Tedeschi , Gianmarco Ottavi , Nils Wistoff , César Fuguet , Davide Rossi , Luca Benini