相关论文: Gigabit Ethernet Daisy-Chain on FPGA for COMET Rea…

An experiment to search for mu-e conversion named COMET is being constructed at J-PARC. The experiment will be carried out using a two-stage approach of Phase-I and Phase-II. The data taking system of Phase-I is developed based on common…

With the increasing physical event rate and number of electronic channels, traditional readout scheme meets the challenge of improving readout speed caused by the limited bandwidth of crate backplane. In this paper, a high-speed data…

We are developing a new readout board with a newer generation field-programmable gate array (FPGA) and the 10-gigabit ethernet to improve the performance and usability of the current readout board based on the 1-gigabit Ethernet. In this…

State of the art detector readout electronics require high-throughput data acquisition (DAQ) systems. In many applications, e. g. for medical imaging, the front-end electronics are set up as separate modules in a distributed DAQ. A…

The GPU-accelerated track finding method is investigated to track electrons from neutrinoless muon decay in the COMET Phase-I experiment. Inside the cylindrical drift chamber, one third of the signal electron trajectories are composed of…

The COMET experiment aims to search for the neutrinoless muon to electron transition process with new sensitivity levels. The online trigger system is an integral part of achieving the sensitivity levels required and will be subject to an…

Data logging at an upgraded KEKB accelerator or the J-PARC facility, currently under commission, requires a high density data acquisition platform with integrated data reduction CPUs. To follow market trends, we have developed a DAQ…

An FPGA-based online trigger system has been developed for the COMET Phase-I experiment. This experiment searches for muon-to-electron conversion, which has never been observed yet. A drift chamber and trigger counters detect a…

A new $\mu$TCA DAQ system was introduced in CANDLES experiment with SpaceWire-to-GigabitEthernet (SpaceWire-GigabitEthernet) network for data readout and Flash Analog-to-Digital Converters (FADCs). With SpaceWire-GigabitEthernet, we can…

With the rapid development of network protocol, TCP/IP has been widely applied in various OS systems because of its advantages of high-speed network transmission and standardization. Furthermore, TCP/IP has the functions of retransmission…

Dynamical decoupling is a technique that protects qubits against noise. The ability to preserve quantum coherence in the presence of noise is essential for the development of quantum devices. Here the Rigetti quantum computing platform was…

Radiation damage on front-end readout and trigger electronics is an important issue in the COMET Phase-I experiment at J-PARC, which plans to search for the neutrinoless transition of a muon to an electron. To produce an intense muon beam,…

Due to the advantages of universality, flexibility and high performance, fast Ethernet is widely used in readout system design of modern particle physics experiments. However, Ethernet is usually used together with TCP/IP protocol stack,…

This letter presents an energy- and memory-efficient pattern-matching engine for a network intrusion detection system (NIDS) in the Internet of Things. Tightly coupled architecture and circuit co-designs are proposed to fully exploit the…

Transformers have revolutionized AI in natural language processing and computer vision, but their large computation and memory demands pose major challenges for hardware acceleration. In practice, end-to-end throughput is often limited by…

With the significant growth of advanced high-frequency power converters, on-line monitoring and active reliability assessment of power electronic devices are extremely crucial. This article presents a transformative approach, named Deep…

A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…

The Technical Design for the COMET Phase-I experiment is presented in this paper. COMET is an experiment at J-PARC, Japan, which will search for neutrinoless conversion of muons into electrons in the field of an aluminium nucleus ($\mu-e$…

COFFEE series is a HVCMOS pixel sensor using the advanced 55 nm process, currently being developed for the Upstream Pixel (UP) tracker of the LHCb Upgrade II. To ensure that COFFEE will be able to handle the particle hit rates at UP…

We have implemented a control system for experiments in atomic, molecular and optical physics based on a commercial low-cost board, featuring a field-programmable gate array as part of a system-on-a-chip on which a Linux operating system is…