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We propose a Digital Neuron, a hardware inference accelerator for convolutional deep neural networks with integer inputs and integer weights for embedded systems. The main idea to reduce circuit area and power consumption is manipulating…

信号处理 · 电气工程与系统科学 2019-02-08 Hyunbin Park , Dohyun Kim , Shiho Kim

To speedup Deep Neural Networks (DNN) accelerator design and enable effective implementation, we propose HybridDNN, a framework for building high-performance hybrid DNN accelerators and delivering FPGA-based hardware implementations. Novel…

硬件体系结构 · 计算机科学 2020-04-09 Hanchen Ye , Xiaofan Zhang , Zhize Huang , Gengsheng Chen , Deming Chen

Recent works on Binary Neural Networks (BNNs) have made promising progress in narrowing the accuracy gap of BNNs to their 32-bit counterparts. However, the accuracy gains are often based on specialized model designs using additional 32-bit…

机器学习 · 计算机科学 2021-06-15 Nianhui Guo , Joseph Bethge , Haojin Yang , Kai Zhong , Xuefei Ning , Christoph Meinel , Yu Wang

Deep learning hardware designs have been bottlenecked by conventional memories such as SRAM due to density, leakage and parallel computing challenges. Resistive devices can address the density and volatility issues, but have been limited by…

新兴技术 · 计算机科学 2020-10-28 Shihui Yin , Xiaoyu Sun , Shimeng Yu , Jae-sun Seo

Modern hardware design trends have shifted towards specialized hardware acceleration for computationally intensive tasks like machine learning and computer vision. While these complex workloads can be accelerated by commercial GPUs,…

硬件体系结构 · 计算机科学 2021-08-06 Caleb Terrill , Fred Chu

In this paper, we propose a low-power hardware for efficient deployment of binarized neural networks (BNNs) that have been trained for physiological datasets. BNNs constrain weights and feature-map to 1 bit, can pack in as many 1-bit…

信号处理 · 电气工程与系统科学 2019-03-28 Morteza Hosseini , Hirenkumar Paneliya , Uttej Kallakuri , Mohit Khatwani , Tinoosh Mohsenin

Edge AI applications increasingly require models that can learn and adapt on-device with minimal energy budget. Traditional deep learning models, while powerful, are often overparameterized, energy-hungry, and dependent on cloud…

硬件体系结构 · 计算机科学 2025-06-24 Muhammad Ihsan Al Hafiz , Naresh Ravichandran , Anders Lansner , Pawel Herman , Artur Podobas

Binary Neural Networks (BNNs) show promising progress in reducing computational and memory costs but suffer from substantial accuracy degradation compared to their real-valued counterparts on large-scale datasets, e.g., ImageNet. Previous…

机器学习 · 计算机科学 2019-06-21 Joseph Bethge , Haojin Yang , Marvin Bornstein , Christoph Meinel

This paper proposes ReBNet, an end-to-end framework for training reconfigurable binary neural networks on software and developing efficient accelerators for execution on FPGA. Binary neural networks offer an intriguing opportunity for…

机器学习 · 计算机科学 2018-03-29 Mohammad Ghasemzadeh , Mohammad Samragh , Farinaz Koushanfar

In the low-bit quantization field, training Binary Neural Networks (BNNs) is the extreme solution to ease the deployment of deep models on resource-constrained devices, having the lowest storage cost and significantly cheaper bit-wise…

计算机视觉与模式识别 · 计算机科学 2021-10-19 Yikai Wang , Yi Yang , Fuchun Sun , Anbang Yao

Deep neural network (DNN) accelerators with improved energy and delay are desirable for meeting the requirements of hardware targeted for IoT and edge computing systems. Convolutional neural networks (CoNNs) belong to one of the most…

计算机视觉与模式识别 · 计算机科学 2019-05-06 Qiuwen Lou , Chenyun Pan , John McGuiness , Andras Horvath , Azad Naeemi , Michael Niemier , X. Sharon Hu

Binary Neural Networks (BNNs), where weights and activations are constrained to binary values (+1, -1), are a highly efficient alternative to traditional neural networks. Unfortunately, typical BNNs, while binarizing linear layers…

硬件体系结构 · 计算机科学 2026-01-29 Yuval Harary , Almog Sharoni , Esteban Garzón , Marco Lanuzza , Adam Teman , Leonid Yavits

Binarized neural networks, or BNNs, show great promise in edge-side applications with resource limited hardware, but raise the concerns of reduced accuracy. Motivated by the complex neural networks, in this paper we introduce complex…

神经与进化计算 · 计算机科学 2021-04-21 Yanfei Li , Tong Geng , Ang Li , Huimin Yu

The acceleration of pruned Deep Neural Networks (DNNs) on edge devices such as Microcontrollers (MCUs) is a challenging task, given the tight area- and power-constraints of these devices. In this work, we propose a three-fold contribution…

While hardware implementations of inference routines for Binarized Neural Networks (BNNs) are plentiful, current realizations of efficient BNN hardware training accelerators, suitable for Internet of Things (IoT) edge devices, leave much to…

计算机视觉与模式识别 · 计算机科学 2021-02-18 Corey Lammie , Wei Xiang , Mostafa Rahimi Azghadi

Deep convolution Neural Network (DCNN) has been widely used in computer vision tasks. However, for edge devices even inference has too large computational complexity and data access amount. The inference latency of state-of-the-art models…

硬件体系结构 · 计算机科学 2025-09-09 Kuan-Ting Lin , Ching-Te Chiu , Jheng-Yi Chang , Shi-Zong Huang , Yu-Ting Li

Binarized Neural Network (BNN) removes bitwidth redundancy in classical CNN by using a single bit (-1/+1) for network parameters and intermediate representations, which has greatly reduced the off-chip data transfer and storage overhead.…

机器学习 · 计算机科学 2018-10-05 Cheng Fu , Shilin Zhu , Hao Su , Ching-En Lee , Jishen Zhao

Graph neural networks (GNNs) have gained significant interest for applications such as citation network analysis and drug discovery due to their ability to apply machine learning techniques on graph-structured data. GNNs typically employ a…

硬件体系结构 · 计算机科学 2026-05-28 Siddhartha Raman Sundara Raman , Lizy John , Jaydeep P. Kulkarni

The advent of deep learning has considerably accelerated machine learning development. The deployment of deep neural networks at the edge is however limited by their high memory and energy consumption requirements. With new memory…

Neural network hardware is considered an essential part of future edge devices. In this paper, we propose a binary-weight spiking neural network (BW-SNN) hardware architecture for low-power real-time object classification on edge platforms.…

信号处理 · 电气工程与系统科学 2020-03-16 Pai-Yu Tan , Po-Yao Chuang , Yen-Ting Lin , Cheng-Wen Wu , Juin-Ming Lu