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The PCIe400 is a generic readout board designed for high-throughput data acquisition in future high-energy physics experiments. It interfaces up to 48 bidirectional links supporting custom protocols from 1 to 26 Gbps to modern back-end…

This work presents the design and preliminary performance of a highly-multiplexed superconducting detector readout. The readout system is implemented on the Xilinx ZCU111 RFSoC Evaluation Board. The current design uses 12% of the DSPs, 60%…

This paper presents a novel IP design for real-time fault/error detection and recovery on a peripheral component interconnect express (PCIe) which interfaces a host system (here a PC) to a slave design including processing system and memory…

High Voltage CMOS sensors are a promising technology for tracking detectors in collider experiments. Extensive R&D studies are being carried out by the ATLAS Collaboration for a possible use of HV-CMOS in the High Luminosity LHC upgrade of…

As from the run 3 of CERN LHC scheduled in 2022, the upgraded ALICE experiment will use a Common Readout Unit (CRU) at the heart of the data acquisition system. The CRU, based on the PCIe40 hardware designed for LHCb, is a common interface…

Large language model (LLM) inference performance is increasingly bottlenecked by the memory wall. While GPUs continue to scale raw compute throughput, they struggle to deliver scalable performance for memory bandwidth bound workloads. This…

The LHCb Upgrade I introduced a triggerless data acquisition system, crucial for readout across sub-detectors. Upgrade II aims for fivefold throughput enhancement and requires precise clock distribution. The PCIe400 development…

With the rapid development of network protocol, TCP/IP has been widely applied in various OS systems because of its advantages of high-speed network transmission and standardization. Furthermore, TCP/IP has the functions of retransmission…

The GOSIP (Gigabit Optical Serial Interface Protocol) provides communication via optical fibres between multiple kinds of front-end electronics and the KINPEX PCIe receiver board located in the readout host PC. In recent years a stack of…

In order to meet the requirements of the High Luminosity LHC (HL-LHC), it will be necessary to replace the current tracker of the ATLAS experiment. Therefore, a new all-silicon tracking detector is being developed, the so-called Inner…

The advent of computationally demanding algorithms and high data rate instruments in new space applications pushes the space industry to explore disruptive solutions for on-board data processing. We examine heterogeneous computing…

The separation of the data capture and analysis in modern vision systems has led to a massive amount of data transfer between the end devices and cloud computers, resulting in long latency, slow response, and high power consumption.…

A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…

We are developing a new readout board with a newer generation field-programmable gate array (FPGA) and the 10-gigabit ethernet to improve the performance and usability of the current readout board based on the 1-gigabit Ethernet. In this…

We have developed a silicon pixel detector to enhance the physics capabilities of the PHENIX experiment. This detector, consisting of two layers of sensors, will be installed around the beam pipe at the collision point and covers a…

This paper proposes a PCI Express (PCIE) Wrapper core named PWrapper with FIFO interfaces. Compared with other PCIE solutions, PWrapper has several advantages such as flexibility, isolation of clock domain, etc. PWrapper is implemented and…

For space-based astronomical observations, it is important to have a mechanism to capture the digital output from the standard detector for further on-board analysis and storage. We have developed a generic (application- wise)…

Many small and medium-sized physics experiments are being conducted worldwide. These experiments have similar requirements for readout electronics, especially the back-end electronics. Some experiments need a trigger logic unit(TLU) to…

The innermost part of the ATLAS experiment at the LHC, CERN, will be a pixel detector. The command messages and the readout data of the detector are transmitted over an optical data path. The readout chain consists of many components which…

In view of the LHC upgrade phases towards HL-LHC the ATLAS experiment plans to upgrade the Inner Detector with an all silicon system. The n-in-p silicon technology is a promising candidate for the pixel upgrade thanks to its radiation…