相关论文: TiCkS: A Flexible White-Rabbit Based Time-Stamping…

Integration of RIS in radio access networks requires signaling between edge units and the RIS microcontroller (MC). Unfortunately, in several practical scenarios, the signaling latency is higher than the communication channel coherence…

Liquid crystal (LC) is a promising hardware solution for implementing large RISs, as it is cost-effective, energy efficient, scalable, and capable of providing continuous phase shifts with low power consumption. However, the phase shift…

A large area Resistive Plate Chamber (RPC) with a total active surface of 160x10 cm2 was built and tested. The surface was segmented in two 5 cm wide strips readout on both ends with custom, very high frequency, front end electronics. A…

Intelligent reflecting surface (IRS) is an emerging technology that is able to reconfigure the wireless channel via tunable passive signal reflection and thereby enhance the spectral and energy efficiency of wireless networks…

Time series classification is an important data mining task that has received a lot of interest in the past two decades. Due to the label scarcity in practice, semi-supervised time series classification with only a few labeled samples has…

Timing optimization during global placement is critical for achieving optimal circuit performance and remains a key challenge in modern Field Programmable Gate Array (FPGA) design. As FPGA designs scale and heterogeneous resources increase,…

Achieving precise time synchronization in wireless systems is essential for both industrial applications and 5G, where sub-microsecond accuracy is required. However, since the Industrial Internet of Things (IIoT) market is negligible…

The t0.technology Control and Readout System (CRS) is a modular microwave control and readout system for mm-wave and radio astronomy, THz imaging, noise radar, and superconducting qubit control. The configuration discussed in this work…

Timing synchronization (TS) is vital for orthogonal frequency division multiplexing (OFDM) systems, which makes the discrete Fourier transform (DFT) window start at the inter-symbol-interference (ISI)-free region. However, the multi-path…

A complete data acquisition and signal output control system for synchronous stimuli generation, geared towards in vivo neuroscience experiments, was developed using the Terasic DE2i-150 board. All emotions and thoughts are an emergent…

The growing number of Internet-of-Things (IoT) based artificial intelligence (AI) applications deployed at resource-constrained network edge call for ultra-reliable and low-latency data processing pipelines from distributed front-end…

Time-sensitive networks are designed to meet stringent Quality of Service (QoS) requirements for mixed-criticality traffic with diverse performance demands. Ensuring deterministic guarantees for such traffic while reducing deployment costs…

Identity authentication is crucial for ensuring the information security of wireless communication. Radio frequency (RF) fingerprinting techniques provide a prom-ising supplement to cryptography-based authentication approaches but rely on…

In this paper, we present a novel communication system model that integrates reconfigurable intelligent surfaces (RIS), spatial shift keying (SSK), and code index modulation (CIM) based on Hadamard coding called RIS based transmit SSK-CIM…

Spike-based encoders represent information as sequences of spikes or pulses, which are transmitted between neurons. A prevailing consensus suggests that spike-based approaches demonstrate exceptional capabilities in capturing the temporal…

Astrophysical time series often contain periodic signals. The large and growing volume of time series data from photometric surveys demands computationally efficient methods for detecting and characterizing such signals. The most efficient…

Time-digital Converter (TDC) aims to measure the arrival time of the leading edge of the pulse signal. Our recent work presented a high resolution multi-phase TDC based on the Kintex-7 Field Programmable Gate Array (FPGA) device. A simple…

Time-sensitive networking (TSN) is a set of IEEE standards that extends Ethernet with real-time capabilities. Among its mechanisms, the time-aware shaper (TAS) periodically opens and closes egress queues to protect scheduled traffic from…

We have implemented a control system for experiments in atomic, molecular and optical physics based on a commercial low-cost board, featuring a field-programmable gate array as part of a system-on-a-chip on which a Linux operating system is…

We ported the firmware of the ARTIQ experiment control infrastructure to an embedded system based on a commercial Xilinx Zynq-7000 system-on-chip. It contains high-performance hardwired CPU cores integrated with FPGA fabric. As with…