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Graphics Processing Units (GPUs) have become the leading hardware accelerator for deep learning applications and are used widely in training and inference of transformers; transformers have achieved state-of-the-art performance in many…

硬件体系结构 · 计算机科学 2024-05-03 Andy He , Darren Key , Mason Bulling , Andrew Chang , Skyler Shapiro , Everett Lee

Autonomous control systems onboard planetary rovers and spacecraft benefit from having cognitive capabilities like learning so that they can adapt to unexpected situations in-situ. Q-learning is a form of reinforcement learning and it has…

机器学习 · 计算机科学 2017-01-27 Pranay Gankidi , Jekan Thangavelautham

Research has shown that deep neural networks contain significant redundancy, and thus that high classification accuracy can be achieved even when weights and activations are quantized down to binary values. Network binarization on FPGAs…

机器学习 · 计算机科学 2020-03-04 Erwei Wang , James J. Davis , Peter Y. K. Cheung , George A. Constantinides

Domain-specialized FPGAs have delivered unprecedented performance for low-latency inference across scientific and industrial workloads, yet nearly all existing accelerators assume static models trained offline, relegating learning and…

硬件体系结构 · 计算机科学 2026-02-03 Duc Hoang

Convolutional neural networks (CNNs) have been widely employed in many applications such as image classification, video analysis and speech recognition. Being compute-intensive, CNN computations are mainly accelerated by GPUs with high…

硬件体系结构 · 计算机科学 2016-11-09 Dong Wang , Jianjing An , Ke Xu

Dynamic Graph Neural Networks (DGNNs) are becoming increasingly popular due to their effectiveness in analyzing and predicting the evolution of complex interconnected graph-based systems. However, hardware deployment of DGNNs still remains…

硬件体系结构 · 计算机科学 2023-04-17 Hanqiu Chen , Cong Hao

The rapid development of large language models (LLM) has greatly enhanced everyday applications. While many FPGA-based accelerators, with flexibility for fine-grained data control, exhibit superior speed and energy efficiency compared to…

硬件体系结构 · 计算机科学 2026-03-24 Zifan He , Shengyu Ye , Rui Ma , Yang Wang , Jason Cong

As AI chips incorporate numerous parallelized cores to scale deep learning (DL) computing, inter-core communication is enabled recently by employing high-bandwidth and low-latency interconnect links on the chip (e.g., Graphcore IPU). It…

分布式、并行与集群计算 · 计算机科学 2024-09-25 Yiqi Liu , Yuqi Xue , Yu Cheng , Lingxiao Ma , Ziming Miao , Jilong Xue , Jian Huang

The design and implementation of Deep Learning (DL) models is currently receiving a lot of attention from both industrials and academics. However, the computational workload associated with DL is often out of reach for low-power embedded…

硬件体系结构 · 计算机科学 2022-12-09 Etienne Dupuis , Silviu-Ioan Filip , Olivier Sentieys , David Novo , Ian O'Connor , Alberto Bosio

Recently low-precision deep learning accelerators (DLAs) have become popular due to their advantages in chip area and energy consumption, yet the low-precision quantized models on these DLAs bring in severe accuracy degradation. One way to…

计算机视觉与模式识别 · 计算机科学 2022-08-04 Qinghao Hu , Gang Li , Qiman Wu , Jian Cheng

Though CNNs are highly parallel workloads, in the absence of efficient on-chip memory reuse techniques, an accelerator for them quickly becomes memory bound. In this paper, we propose a CNN accelerator design for inference that is able to…

分布式、并行与集群计算 · 计算机科学 2025-08-26 Kingshuk Majumder , Shubham Nema , Uday Bondhugula

Data loading can dominate deep neural network training time on large-scale systems. We present a comprehensive study on accelerating data loading performance in large-scale distributed training. We first identify performance and scalability…

机器学习 · 计算机科学 2020-02-20 Chih-Chieh Yang , Guojing Cong

Tensor processing units (TPUs) are one of the most well-known machine learning (ML) accelerators utilized at large scale in data centers as well as in tiny ML applications. TPUs offer several improvements and advantages over conventional ML…

硬件体系结构 · 计算机科学 2024-07-12 Mohammed Elbtity , Peyton Chandarana , Ramtin Zand

The fast proliferation of extreme-edge applications using Deep Learning (DL) based algorithms required dedicated hardware to satisfy extreme-edge applications' latency, throughput, and precision requirements. While inference is achievable…

硬件体系结构 · 计算机科学 2022-04-26 Yvan Tortorella , Luca Bertaccini , Davide Rossi , Luca Benini , Francesco Conti

The deep learning accelerator is one of the methods to accelerate deep learning network computations, which is mainly based on convolutional neural network acceleration. To address the fact that concurrent convolutional neural network…

硬件体系结构 · 计算机科学 2019-07-05 Shi Shi

Recently, FPGA has been increasingly applied to problems such as speech recognition, machine learning, and cloud computation such as the Bing search engine used by Microsoft. This is due to FPGAs great parallel computation capacity as well…

神经与进化计算 · 计算机科学 2017-11-17 Yufeng Hao , Steven Quigley

The exponential emergence of Field Programmable Gate Array (FPGA) has accelerated the research of hardware implementation of Deep Neural Network (DNN). Among all DNN processors, domain specific architectures, such as, Google's Tensor…

硬件体系结构 · 计算机科学 2022-02-15 Rourab Paul , Sreetama Sarkar , Suman Sau , Koushik Chakraborty , Sanghamitra Roy , Amlan Chakrabarti

Deep learning has been used in a wide range of areas and made a huge breakthrough. With the ever-increasing model size and train-ing data volume, distributed deep learning emerges which utilizes a cluster to train a model in parallel.…

网络与互联网体系结构 · 计算机科学 2022-08-11 Heng Pan , Penglai Cui , Zhenyu li , Ru Jia , Penghao Zhang , Leilei Zhang , Ye Yang , Jiahao Wu , Jianbo Dong , Zheng Cao , Qiang Li , Hongqiang Harry Liu , Mathy Laurent , Gaogang Xie

Neural Networks (NN) provide a solid and reliable way of executing different types of applications, ranging from speech recognition to medical diagnosis, speeding up onerous and long workloads. The challenges involved in their…

硬件体系结构 · 计算机科学 2023-09-26 Federico Manca , Francesco Ratto

Graphics Processing Units (GPUs) are currently the dominating programmable architecture for Deep Learning (DL) accelerators. The adoption of Field Programmable Gate Arrays (FPGAs) in DL accelerators is however getting momentum. In this…

硬件体系结构 · 计算机科学 2021-02-03 Walther Carballo-Hernández , Maxime Pelcat , François Berry