We report a method of fabricating self-aligned, top-gated graphene field-effect transistors (GFETs) employing polyethyleneimine spin-on-doped source/drain access regions, resulting in a 2X reduction of access resistance and a 2.5X improvement in device electrical characteristics, over undoped devices. The GFETs on Si/SiO2 substrates have high carrier mobilities of up to 6,300 cm2/Vs. Self-aligned spin-on-doping is applicable to GFETs on arbitrary substrates, as demonstrated by a 3X enhancement in performance for GFETs on insulating quartz substrates, which are better suited for radio frequency applications.
@article{arxiv.1210.5535,
title = {Self-aligned graphene field-effect transistors with polyethyleneimine doped source/drain access regions},
author = {Hema C. P. Movva and Michael E. Ramón and Chris M. Corbet and Sushant Sonde and Sk. Fahad Chowdhury and Gary Carpenter and Emanuel Tutuc and Sanjay K. Banerjee},
journal= {arXiv preprint arXiv:1210.5535},
year = {2012}
}