基于ORBGRAND的软判决译码高通量VLSI架构
信息论
2021-05-18 v1 硬件体系结构
math.IT
摘要
猜测随机加性噪声译码（GRAND）是近年来提出的一种近似最大似然（ML）译码技术，可译码任意线性纠错分组码。有序可靠性比特GRAND（ORBGRAND）是GRAND的一种强力变体，通过按特定顺序生成错误图样优于原始GRAND技术。此外，其在算法层面的简洁性使GRAND系列成为对极高吞吐量有需求应用的可取候选。本工作报道了首个ORBGRAND硬件架构，在信噪比10 dB、码长128时实现高达42.5 Gbps的平均吞吐量。而且，所提硬件可用于译码任意满足长度与速率约束的码。与使用5G极化(128,105)码的当前最优快速动态连续消除翻转译码器（Fast-DSCF）相比，所提VLSI实现的平均吞吐量高出49倍，同时保持相近的译码性能。
引用
@article{arxiv.2105.07115,
title = {High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND},
author = {Syed Mohsin Abbas and Thibaud Tonnellier and Furkan Ercan and Marwan Jalaleddine and Warren J. Gross},
journal= {arXiv preprint arXiv:2105.07115},
year = {2021}
}
备注
Please note that a mislabeling in Fig. 1 has occurred in the IEEE Xplore version of this paper. This error has been corrected in this version of the manuscript. (Accepted in ICASSP 2021)