Related papers: PCIe400 generic readout board qualification test

The LHCb Upgrade I introduced a triggerless data acquisition system, crucial for readout across sub-detectors. Upgrade II aims for fivefold throughput enhancement and requires precise clock distribution. The PCIe400 development…

This work gives an overview of the PCI-Express board $\pi$LUP, focusing on the motivation that led to its development, the technological choices adopted and its performance. The $\pi$LUP card was designed by INFN and University of Bologna…

The PCI diagnostic is an internal reference interferometer that creates an image of absolutely calibrated electron density fluctuations integrated along the line of sight of the probing light beam. While conventional PCI diagnostics…

Belle II is a new-generation B-factory experiment, dedicated to exploring new physics beyond the standard model of elementary particles in the flavor sector. Belle~II started data-taking in April 2018, using a synchronous data acquisition…

Time-tagging units and coincidence detectors are used in many scientific research fields. The required timing resolution and number of input channels are varying, but some emerging experiments in the field of quantum optics require up to 32…

A large Time Projection Chamber is the main device for tracking and charged-particle identification in the ALICE experiment at the CERN LHC. After the second long shutdown in 2019/20, the LHC will deliver Pb beams colliding at an…

ALICE (A Large Ion Collider Experiment) is the heavy-ion detector designed to study the strongly interacting state of matter realized in relativistic heavy-ion collisions at the CERN Large Hadron Collider (LHC). A major upgrade of the…

The CMS collaboration is building a new inner tracking pixel detector for the High-Luminosity LHC. Each pixel readout chip will be controlled with a single serial input stream at 160 Mbps and will send out data via four current mode logic…

COFFEE series is a HVCMOS pixel sensor using the advanced 55 nm process, currently being developed for the Upstream Pixel (UP) tracker of the LHCb Upgrade II. To ensure that COFFEE will be able to handle the particle hit rates at UP…

As from the run 3 of CERN LHC scheduled in 2022, the upgraded ALICE experiment will use a Common Readout Unit (CRU) at the heart of the data acquisition system. The CRU, based on the PCIe40 hardware designed for LHCb, is a common interface…

Data logging at an upgraded KEKB accelerator or the J-PARC facility, currently under commission, requires a high density data acquisition platform with integrated data reduction CPUs. To follow market trends, we have developed a DAQ…

We are developing a new readout board with a newer generation field-programmable gate array (FPGA) and the 10-gigabit ethernet to improve the performance and usability of the current readout board based on the 1-gigabit Ethernet. In this…

An earlier study of a high layer-count test board using plated-through-hole (PTH) vias and a limited quantity of laser vias was shown to be capable of supporting 112 Gb/s PAM-4 links (or equivalent signaling having 28 GHz (Nyquist)…

A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…

The large scientific projects present new technological challenges, such as the distributed control over a communication network. In particular, the middleware EPICS is the most extended communication standard in particle accelerators. The…

As the Chinese Spallation Neutron Source enters Phase II, the increase in proton beam power will lead to a further boost in the intensity of pulsed neutron beams. To address the demand for higher event-rate readout electronics for…

After the Large Hadron Collider (LHC) upgrade into High Luminosity LHC (HL-LHC), the instantaneous luminosity is expected to reach values up to 7.5x10^34cm^2/s, causing a harsher radiation environment as well as a significant increase in…

Photonic integrated circuits (PICs) offer ultra-broad optical bandwidths that enable unprecedented data throughputs for signal processing applications. Dynamic reconfigurability enables compensation of fabrication flaws and fluctuating…

Data center interconnects (DCIs) will have to support throughputs of 400 Gbps or more per wavelength in the near future. To achieve such high data rates, coherent modulation and detection is used, which conventionally requires high-speed…

In the new era of HL-LHC experiments, fast-timing detectors are emerging as critical tools for background rejection. Typical requirements include a temporal hit resolution of about 50 ps, a spatial resolution of around 12 $\mu$m, and…