Related papers: TSPC-PFD: TSPC-Based Low-Power High-Resolution CMO…
Time-tagging units and coincidence detectors are used in many scientific research fields. The required timing resolution and number of input channels are varying, but some emerging experiments in the field of quantum optics require up to 32…
The recent introduction of coherent optical communications has created a compelling need for ultra-fast phase-sensitive measurement techniques operating at milliwatt peak power levels and in time scales ranging from sub-picoseconds to…
Phase noise (PN) is a critical impairment at D-band frequencies (110 to 170 GHz), which are widely investigated as promising candidates for beyond 5G/6G ISAC systems. This paper evaluates OFDM based ISAC sensing performance under realistic…
The search for a compatible application of memristor-CMOS logic gates has remained elusive, as the data density benefits are offset by slow switching speeds and resistive dissipation. Active microdisplays typically prioritize pixel density…
This paper propose a decoder architecture for low-density parity-check convolutional code (LDPCCC). Specifically, the LDPCCC is derived from a quasi-cyclic (QC) LDPC block code. By making use of the quasi-cyclic structure, the proposed…
Timing optimization during global placement is critical for achieving optimal circuit performance and remains a key challenge in modern Field Programmable Gate Array (FPGA) design. As FPGA designs scale and heterogeneous resources increase,…
Single Photon Detectors (SPD) are fundamental to quantum optics and quantum information. Superconducting Nanowire SPDs (SNSPD) [1] provide high performance in terms of quantum efficiency (QE), dark count rate (DCR) and timing jitter [2],…
We have developed a Time-to-Digital Converter (TDC) application in a Xilinx Kintex-7 Field Programmable Gate Array (FPGA). This TDC, based on the Tapped-Delay Line (TDL) and Wave Union A (WU-A) techniques, achieves an independent time…
This paper introduces a new approach to cost-effective, high-throughput hardware designs for Low Density Parity Check (LDPC) decoders. The proposed approach, called Non-Surjective Finite Alphabet Iterative Decoders (NS-FAIDs), exploits the…
Fully Field Programmable Gate Array (FPGA)based digitizer for high-resolution time and energy measurement is an attractive low cost solution for the readout electronics in positron emission computed tomography (PET)detector. In recent…
Modern communication and computer systems require rapid (Gbps), efficient and large bandwidth data transfers. Agressive scaling of digital integrated systems allow buses and communication controller circuits to be integrated with the…
This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter…
Clock generators are an essential and critical building block of any communication link, whether it be wired or wireless, and they are increasingly critical given the push for lower I/O power and higher bandwidth in Systems-on-Chip (SoCs)…
In current generation digital phase locked loop (DPLL) architectures, techniques like adaptive loop bandwidth with loop order switching and switched phase-detection are employed to achieve better lock time and jitter performance. This work…
In this paper we present a novel high-resolution multi-channel FPGA-based time-to-digital converter (TDC). We designed and implemented a complex electronic circuit on the FPGA, whose overall accuracy is several orders of magnitude greater…
Protection against dc faults is one of the main technical hurdles faced when operating converter-based HVdc systems. Protection becomes even more challenging for multi-terminal dc (MTdc) systems with more than two terminals/converter…
This paper presents a compact, low-power, direct RF multi-phase-shift keying (PSK) transmitter (TX) that eliminates the need for a phase-locked loop (PLL) by performing phase modulation directly within a ring oscillator. The proposed…
In current MIMO mobile communication systems, phase noise can significantly impair performance. To allow for compensation of these impairments, accurate phase noise modeling is necessary. Numerical modeling of the phase noise process at a…
Single photon detection played an important role in the development of quantum optics. Its implementation in the microwave domain is challenging because the photon energy is 5 orders of magnitude smaller. In recent years, significant…
This work presents the design and preliminary performance of a highly-multiplexed superconducting detector readout. The readout system is implemented on the Xilinx ZCU111 RFSoC Evaluation Board. The current design uses 12% of the DSPs, 60%…