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Cryptographic operations are critical for securing IoT, edge computing, and autonomous systems. However, current RISC-V platforms lack efficient hardware support for comprehensive cryptographic algorithm families and post-quantum…

Hardware Architecture · Computer Science 2026-02-05 Anh Kiet Pham , Van Truong Vo , Vu Trung Duong Le , Tuan Hai Vu , Hoai Luan Pham , Van Tinh Nguyen , Yasuhiko Nakashima

This paper describes the design of a 1024-core processor chip in 16nm FinFet technology. The chip ("Epiphany-V") contains an array of 1024 64-bit RISC processors, 64MB of on-chip SRAM, three 136-bit wide mesh Networks-On-Chip, and 1024…

Hardware Architecture · Computer Science 2016-10-07 Andreas Olofsson

This paper presents a mixed-computation neural network processing approach for edge applications that incorporates low-precision (low-width) Posit and low-precision fixed point (FixP) number systems. This mixed-computation approach employs…

Machine Learning · Computer Science 2023-12-06 Seyedarmin Azizi , Mahdi Nazemi , Mehdi Kamal , Massoud Pedram

Edge-AI applications still face considerable challenges in enhancing computational efficiency in resource-constrained environments. This work presents RAMAN, a resource-efficient and approximate posit(8,2)-based Multiply-Accumulate (MAC)…

Hardware Architecture · Computer Science 2025-10-28 Mohd Faisal Khan , Mukul Lokhande , Santosh Kumar Vishvakarma

This paper explores the adaptation of Transformerbased models for edge devices through the quantisation and hardware acceleration of the ARM Keyword Transformer (KWT) model on a RISC-V platform. The model was targeted to run on 64kB RAM in…

Hardware Architecture · Computer Science 2025-11-21 Aness Al-Qawlaq , Ajay Kumar M , Deepu John

Neural Networks (NNs) have been widely adopted due to their outstanding efficacy and adaptability across computer vision and deep learning applications. The optimization of NNs is necessary to enable their deployment on energy constrained…

Hardware Architecture · Computer Science 2026-05-12 Pragun Jaswal , L. Hemanth Krishna , B. Srinivasu

Floating-point arithmetic performance determines the overall performance of important applications, from graphics to AI. Meeting the IEEE-754 specification for floating-point requires that final results of addition, subtraction,…

Mathematical Software · Computer Science 2024-04-02 Lucas M. Dutton , Christopher Kumar Anand , Robert Enenkel , Silvia Melitta Müller

The RISC-V SVNAPOT Extension aims to remedy the performance overhead of the Memory Management Unit (MMU), under heavy memory loads. The Privileged Specification defines additional Natural-Power-of-Two (NAPOT) multiples of the 4KB base page…

Symmetric Multi-Processing (SMP) based on cache coherency is crucial for high-end embedded systems like automotive applications. RISC-V is gaining traction, and open-source hardware (OSH) platforms offer solutions to issues such as IP costs…

Following the scale-up of new radio (NR) complexity in 5G and beyond, the physical layer's computing load on base stations is increasing under a strictly constrained latency and power budget; base stations must process > 20-Gb/s uplink…

Signal Processing · Electrical Eng. & Systems 2025-08-11 Marco Bertuletti , Yichao Zhang , Alessandro Vanelli-Coralli , Luca Benini

Processing In Memory (PIM) accelerators are promising architecture that can provide massive parallelization and high efficiency in various applications. Such architectures can instantaneously provide ultra-fast operation over extensive…

Hardware Architecture · Computer Science 2022-07-26 Kazi Abu Zubair , Sumit Kumar Jha , David Mohaisen , Clayton Hughes , Amro Awad

The ever-increasing computational and storage requirements of modern applications and the slowdown of technology scaling pose major challenges to designing and implementing efficient computer architectures. To mitigate the bottlenecks of…

Hardware Architecture · Computer Science 2025-01-10 Matteo Perotti , Samuel Riedel , Matheus Cavalcante , Luca Benini

Spiking Neural Networks (SNNs) have the potential to drastically reduce the energy requirements of AI systems. However, mainstream accelerators like GPUs and TPUs are designed for the high arithmetic intensity of standard ANNs so are not…

Neural and Evolutionary Computing · Computer Science 2025-07-15 Zainab Aizaz , James C. Knight , Thomas Nowotny

The growing demand for edge-AI systems requires arithmetic units that balance numerical precision, energy efficiency, and compact hardware while supporting diverse formats. Posit arithmetic offers advantages over floating- and fixed-point…

Hardware Architecture · Computer Science 2026-01-27 Sonu Kumar , Lavanya Vinnakota , Mukul Lokhande , Santosh Kumar Vishvakarma , Adam Teman

Handling vast amounts of data is crucial in today's world. The growth of high-performance computing has created a need for parallelization, particularly in the area of machine learning algorithms such as ANN (Approximate Nearest Neighbors).…

Machine Learning · Computer Science 2024-07-19 Konstantin Rumyantsev , Pavel Yakovlev , Andrey Gorshkov , Andrey P. Sokolov

Floating point multiplication is one of the crucial operations in many application domains such as image processing, signal processing etc. But every application requires different working features. Some need high precision, some need low…

Hardware Architecture · Computer Science 2020-12-08 S. Arish , R. K. Sharma

A performance model of CVA6 RISC-V processor is built to evaluate performance related modifications before implementing them in RTL. Its accuracy is 99.2% on CoreMark. This model is used to evaluate a superscalar feature for CVA6. During…

Hardware Architecture · Computer Science 2024-10-03 Côme Allart , Jean-Roch Coulon , André Sintzoff , Olivier Potin , Jean-Baptiste Rigaud

RISC-V GPUs present a promising path for supporting GPU applications. Traditionally, GPUs achieve high efficiency through the SPMD (Single Program Multiple Data) programming model. However, modern GPU programming increasingly relies on…

Hardware Architecture · Computer Science 2025-05-07 Huanzhi Pu , Rishabh Ravi , Shinnung Jeong , Udit Subramanya , Euijun Chung , Jisheng Zhao , Chihyo Ahn , Hyesoon Kim

The rapid progress and advancement in electronic chips technology provide a variety of new implementation options for system engineers. The choice varies between the flexible programs running on a general-purpose processor (GPP) and the…

Hardware Architecture · Computer Science 2019-04-11 Issam Damaj

This paper presents SynapticCore-X, a modular and resource-efficient neural processing architecture optimized for deployment on low-cost FPGA platforms. The design integrates a lightweight RV32IMC RISC-V control core with a configurable…

Hardware Architecture · Computer Science 2025-11-18 Arya Parameshwara