English

FeNN: A RISC-V vector processor for Spiking Neural Network acceleration

Neural and Evolutionary Computing 2025-07-15 v1 Artificial Intelligence Hardware Architecture

Abstract

Spiking Neural Networks (SNNs) have the potential to drastically reduce the energy requirements of AI systems. However, mainstream accelerators like GPUs and TPUs are designed for the high arithmetic intensity of standard ANNs so are not well-suited to SNN simulation. FPGAs are well-suited to applications with low arithmetic intensity as they have high off-chip memory bandwidth and large amounts of on-chip memory. Here, we present a novel RISC-V-based soft vector processor (FeNN), tailored to simulating SNNs on FPGAs. Unlike most dedicated neuromorphic hardware, FeNN is fully programmable and designed to be integrated with applications running on standard computers from the edge to the cloud. We demonstrate that, by using stochastic rounding and saturation, FeNN can achieve high numerical precision with low hardware utilisation and that a single FeNN core can simulate an SNN classifier faster than both an embedded GPU and the Loihi neuromorphic system.

Keywords

Cite

@article{arxiv.2506.11760,
  title  = {FeNN: A RISC-V vector processor for Spiking Neural Network acceleration},
  author = {Zainab Aizaz and James C. Knight and Thomas Nowotny},
  journal= {arXiv preprint arXiv:2506.11760},
  year   = {2025}
}

Comments

7 pages, 4 figures. Accepted in Proceedings of Neuro Inspired Computational Elements Conference 2025

R2 v1 2026-07-01T03:15:47.294Z