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By developing a two-dimensional (2D) full quantum simulation, the attributes of carbon nanotube field-effect transistors (CNTFETs) in different temperatures have been comprehensively investigated. Simulations have been performed by…
Semiconductor integrated circuits operated at cryogenic temperature will play an essential role in quantum computing architectures. These can offer equivalent or superior performance to their room-temperature counterparts while enabling a…
Cryogenic low noise amplifiers based on high electron mobility transistors (HEMTs) are widely used in applications such as radio astronomy, deep space communications, and quantum computing, and the physical mechanisms governing the…
In the standard MOSFET description of the drain current $I_{D}$ as a function of applied gate voltage $V_{GS}$, the subthreshold swing $SS(T)\equiv dV_{GS}/d\log I_{D}$ has a fundamental lower limit as a function of temperature $T$ given by…
We perform the characterization and modeling of a floating-gate device realized with a commercial 350-nm CMOS technology at cryogenic temperature. The programmability of the device offers a solution in the realization of a precise and…
We have developed a computer model for the simulation of resistive superconducting fault current limiters in three dimensions. The program calculates the electromagnetic and thermal response of a superconductor to a time-dependent overload…
Large power consumption of silicon CMOS electronics is a challenge in very-large-scale integrated circuits and a major roadblock to fault-tolerant quantum computation. Matching the power dissipation of Si-MOSFETs to the thermal budget at…
High 1/f noise in CryoCMOS devices is a critical parameter to keep under control in the design of complex circuits for low temperatures applications. Current models predict the 1/f noise to scale linearly with temperature, and gate oxide…
Cryogenic field-effect transistors (FETs) offer great potential for a wide range of applications, the most notable example being classical control electronics for quantum information processors. In the latter context, on-chip FETs with low…
This paper outlines the establishment of a generic cryogenic CMOS database in which key electrical parameters and transfer characteristics of the MOSFETs are quantified as functions of device size, temperature/frequency responses.…
Inter-terminal capacitances (ITCs) have major influence on the dynamic performance of power SiC MOSFETs. Knowledge of the exact values for the ITCs is required in order to perform accurate and predictive compact model simulations of their…
We demonstrate a 36$\times$36 gate electrode crossbar that supports 648 narrow-channel field effect transistors (FET) for gate-defined quantum dots, with a quadratic increase in quantum dot count upon a linear increase in control lines. The…
We report first-principles calculations of local heating in nanoscale junctions formed by a single molecule and a gold point contact. Due to a larger heat dissipation, the single molecule heats up less than the gold point contact. We also…
In this letter, we characterize the electrical properties of commercial bulk 40-nm MOSFETs at room and deep cryogenic temperatures, with a focus on quantum information processing (QIP) applications. At 50 mK, the devices operate as…
The measurements of the high - temperature current - voltage characteristics of MoS2 thin - film transistors show that the devices remain functional to temperatures of at least as high as 500 K. The temperature increase results in decreased…
We determine the temperature profile in magnetic nanocontacts submitted to the very large current densities that are commonly used for spin-torque oscillator behavior. Experimentally, the quadratic current-induced increase of the resistance…
While cryogenic-temperature subthreshold swing (SS) in crystalline semiconductors has been widely studied, a careful study on the temperature-dependent SS in amorphous oxide semiconductors remains lacking. In this paper, a comprehensive…
In this paper a commercial 28-nm FDSOI CMOS technology is characterized and modeled from room temperature down to 4.2 K. Here we explain the influence of incomplete ionization and interface traps on this technology starting from the…
This paper describes the setup and the results of the direct on-wafer measurements of a FET noise parameters obtained with a source-pull method at temperatures down to T=4K and in the 5-12 GHz frequency range. The setup consists of a…
Cryogenic semiconductor device models are essential in designing control systems for quantum devices and in benchmarking the benefits of cryogenic cooling for high-performance computing. In particular, the saturation of subthreshold swing…