This paper outlines the establishment of a generic cryogenic CMOS database in which key electrical parameters and transfer characteristics of the MOSFETs are quantified as functions of device size, temperature/frequency responses. Meanwhile, comprehensive device statistical study is conducted to evaluate the influence of variation and mismatch effects at low temperatures. Furthermore, by incorporating the Cryo-CMOS compact model into the process design kit (PDK), the cryogenic 4 Kb SRAM, 5-bit flash ADC and 8-bit current steering DAC are designed, and their performance is readily investigated and optimized on the EDA-compatible platform, hence laying a solid foundation for large-scale cryogenic IC design.
@article{arxiv.2211.05309,
title = {Generic Cryo-CMOS Device Modeling and EDACompatible Platform for Reliable Cryogenic IC Design},
author = {Zhidong Tang and Zewei Wang and Yumeng Yuan and Chang He and Xin Luo and Ao Guo and Renhe Chen and Yongqi Hu and Longfei Yang and Chengwei Cao and Linlin Liu and Liujiang Yu and Ganbing Shang and Yongfeng Cao and Shoumian Chen and Yuhang Zhao and Shaojian Hu and Xufeng Kou},
journal= {arXiv preprint arXiv:2211.05309},
year = {2024}
}