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The bending of a nonconducting piezoelectric ZnO nanowire is simulated by finite element method calculations. The top part is bent by a lateral force, which could be applied by an atomic force microscope (AFM) tip. The generated electrical…
GaSb/InAs heterojunction tunnel field-effect transistors are strong candidates in building future low-power integrated circuits, as they could provide both steep subthreshold swing and large ON-state current ($I_{\rm{ON}}$). However, at…
Superconductor-normal-superconductor (SC-N-SC) weak links enable Cooper-pair tunneling and serve as Josephson junctions (JJs) used in modern superconducting qubits. Conventional JJs rely on vertically stacked Al-AlOx-Al trilayers that are…
Negative differential conductance (NDC) manifests as a significant characteristic of various underlying physics and transport processes in hybrid superconducting devices. In this work, we report the observation of gate-tunable NDC outside…
We have developed a noncontact method for measurement of the interline capacitance in Cu/low-k interconnect. It is based on a miniature test vehicle with net capacitance of a few femto-Farads formed by two 20-\mu m-long parallel wires…
A low-power precision-scalable processor for ConvNets or convolutional neural networks (CNN) is implemented in a 40nm technology. Its 256 parallel processing units achieve a peak 102GOPS running at 204MHz. To minimize energy consumption…
Fixed-point quantization and binarization are two reduction methods adopted to deploy Convolutional Neural Networks (CNN) on end-nodes powered by low-power micro-controller units (MCUs). While most of the existing works use them as…
The true-differential superconductor on-chip amplifier has complementary outputs that float with respect to chip ground. This improves signal integrity and compatibility with the receiving semiconductor stage. Both source-terminated and…
Full Adder is one of the critical parts of logical and arithmetic units. So, presenting a low power full adder cell reduces the power consumption of the entire circuit. Also, using Nano-scale transistors, because of their unique…
In this paper results of Edge-TCT and I-V measurements with passive test structures made in LFoundry 150 nm HV-CMOS process on p-type substrates with different initial resistivities ranging from 0.5 to 3 k$\Omega$cm are presented. Samples…
High performance p- and n-type single-walled carbon nanotube (SWNT) field-effect transistors (FETs) are obtained by using high and low work function metals, Pd and Al as source/drain (S/D) electrodes respectively. Ohmic contacts made to…
We have used a neon focused-ion-beam to fabricate both nanoscale Nb Dayem bridges and NbN phase-slip nanowires located at the short-circuited end of quarter-wavelength coplanar waveguide resonators. The Dayem bridge devices show…
Two-dimensional (2D) layered materials-based field-effect transistors (FETs) are promising for ultimate scaled electron device applications because of the improved electrostatics to atomically thin body thickness. However, compared with the…
Low bit-width Quantized Neural Networks (QNNs) enable deployment of complex machine learning models on constrained devices such as microcontrollers (MCUs) by reducing their memory footprint. Fine-grained asymmetric quantization (i.e.,…
In this article, we investigate electrical transport properties in ultrathin body (UTB) MoS2 two-dimensional (2D) crystals with channel lengths ranging from 2 {\mu}m down to 50 nm. We compare the short channel behavior of sets of MOSFETs…
N-polar GaN/AlN resonant tunneling diodes are realized on single-crystal N-polar GaN bulk substrate by plasma-assisted molecular beam epitaxy growth. The room-temperature current-voltage characteristics reveal a negative differential…
Capacitance-voltage characteristics of individual germanium nanowire field effect transistors were directly measured and used to assess carrier mobility in nanowires for the first time; thereby removing uncertainties in calculated mobility…
In principle a 1D array of nearest-neighbour linked qubits is compatible with fault tolerant quantum computing. However such a restricted topology necessitates a large overhead for shuffling qubits and consequently the fault tolerance…
As quantum hardware advances toward fault-tolerant operation, an intermediate stage known as early fault-tolerant quantum computing (EFTQC) is emerging, where partial error correction enables meaningful computation. In this regime, the…
Beyond active material intrinsic properties, the electrode manufacturing process is a crucial step to reach high energy density and long-life of Li-ion batteries. In particular, very high pressures are applied to the electrode during the…