In this paper results of Edge-TCT and I-V measurements with passive test structures made in LFoundry 150 nm HV-CMOS process on p-type substrates with different initial resistivities ranging from 0.5 to 3 kΩcm are presented. Samples were irradiated with reactor neutrons up to a fluence of 2⋅1015 neq/cm2. Depletion depth was measured with Edge-TCT. Effective space charge concentration Neff was estimated from the dependence of depletion depth on bias voltage and studied as a function of neutron fluence. Dependence of Neff on fluence changes with initial acceptor concentration in agreement with other measurements with p-type silicon. Long term accelerated annealing study of Neff and detector current up to 1280 minutes at 60∘C was made. It was found that Neff and current in reverse biased detector behaves as expected for irradiated silicon.
@article{arxiv.2112.10738,
title = {Study of neutron irradiation effects in Depleted CMOS detector structures},
author = {I. Mandić and V. Cindro and J. Debevc and A. Gorišek and B. Hiti and G. Kramberger and P. Skomina and M. Zavrtanik and M. Mikuž and E. Vilella and C. Zhang and S. Powell and M. Franks and R. Marco-Hernandez and H. Steininger},
journal= {arXiv preprint arXiv:2112.10738},
year = {2022}
}