Charge collection properties of depleted CMOS pixel detector prototypes produced on p-type substrate of 2 kΩcm initial resistivity (by LFoundry 150 nm process) were studied using Edge-TCT method before and after neutron irradiation. The test structures were produced for investigation of CMOS technology in tracking detectors for experiments at HL-LHC upgrade. Measurements were made with passive detector structures in which current pulses induced on charge collecting electrodes could be directly observed. Thickness of depleted layer was estimated and studied as function of neutron irradiation fluence. An increase of depletion thickness was observed after first two irradiation steps to 1⋅1013 n/cm2 and 5⋅1013 n/cm2 and attributed to initial acceptor removal. At higher fluences the depletion thickness at given voltage decreases with increasing fluence because of radiation induced defects contributing to the effective space charge concentration. The behaviour is consistent with that of high resistivity silicon used for standard particle detectors. The measured thickness of the depleted layer after irradiation with 1⋅1015 n/cm2 is more than 50 μm at 100 V bias. This is sufficient to guarantee satisfactory signal/noise performance on outer layers of pixel trackers in HL-LHC experiments.
@article{arxiv.1701.05033,
title = {Neutron irradiation test of depleted CMOS pixel detector prototypes},
author = {Igor Mandić and Vladimir Cindro and Andrej Gorišek and Bojan Hiti and Gregor Kramberger and Marko Mikuž and Marko Zavrtanik and Tomasz Hemperek and Michael Daas and Fabian Hügging and Hans Krügerc and David-Leon Pohl and Norbert Wermes and Laura Gonella},
journal= {arXiv preprint arXiv:1701.05033},
year = {2017}
}